VDIVPS (ZMM, ZMM, ZMM)

Summary:	"Divide Packed Single-Precision Floating-Point Values"
Reference:	https://www.felixcloutier.com/x86/DIVPS.html
Extension:	AVX512EVEX
Category:	AVX512
ISA-Set:	AVX512F_512
CPL:	3
iform:	VDIVPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512
iclass:	VDIVPS
ASM:	VDIVPS

Operands

Operand 1 (w): Register (ZMM0, ZMM1, ZMM2, ZMM3, ZMM4, ZMM5, ZMM6, ZMM7, ZMM8, ZMM9, ZMM10, ZMM11, ZMM12, ZMM13, ZMM14, ZMM15, ZMM16, ZMM17, ZMM18, ZMM19, ZMM20, ZMM21, ZMM22, ZMM23, ZMM24, ZMM25, ZMM26, ZMM27, ZMM28, ZMM29, ZMM30, ZMM31)
Operand 2 (r): Register (ZMM0, ZMM1, ZMM2, ZMM3, ZMM4, ZMM5, ZMM6, ZMM7, ZMM8, ZMM9, ZMM10, ZMM11, ZMM12, ZMM13, ZMM14, ZMM15, ZMM16, ZMM17, ZMM18, ZMM19, ZMM20, ZMM21, ZMM22, ZMM23, ZMM24, ZMM25, ZMM26, ZMM27, ZMM28, ZMM29, ZMM30, ZMM31)
Operand 3 (r): Register (ZMM0, ZMM1, ZMM2, ZMM3, ZMM4, ZMM5, ZMM6, ZMM7, ZMM8, ZMM9, ZMM10, ZMM11, ZMM12, ZMM13, ZMM14, ZMM15, ZMM16, ZMM17, ZMM18, ZMM19, ZMM20, ZMM21, ZMM22, ZMM23, ZMM24, ZMM25, ZMM26, ZMM27, ZMM28, ZMM29, ZMM30, ZMM31)

Latencies
- Latency operand 2 → 1: ≤17
- Latency operand 3 → 1: ≤17
Throughput
- Computed from the port usage: 2.00
- Measured (loop): 10.00
- Measured (unrolled): 10.00
Number of μops
- Executed: 3
- Retire slots: 3
- Decoded (MITE): 3
- Microcode Sequencer (MS): 0
- Requires the complex decoder (3 other instructions can be decoded with simple decoders in the same cycle)
Port usage: 2*p0+1*p05

Latencies
- Latency operand 2 → 1: ≤17
- Latency operand 3 → 1: ≤17
Throughput
- Computed from the port usage: 2.00
- Measured (loop): 10.00
- Measured (unrolled): 10.00
Number of μops
- Executed: 3
- Retire slots: 3
- Decoded (MITE): 3
- Microcode Sequencer (MS): 0
- Requires the complex decoder (2 other instructions can be decoded with simple decoders in the same cycle)
Port usage: 2*p0+1*p05

Latencies
- Latency operand 2 → 1: ≤17
- Latency operand 3 → 1: ≤17
Throughput
- Computed from the port usage: 2.00
- Measured (loop): 10.00
- Measured (unrolled): 10.00
Number of μops
- Executed: 3
- Retire slots: 3
- Decoded (MITE): 3
- Microcode Sequencer (MS): 0
- Requires the complex decoder (2 other instructions can be decoded with simple decoders in the same cycle)
Port usage: 2*p0+1*p05

Latencies
- Latency operand 2 → 1: ≤17
- Latency operand 3 → 1: ≤17
Throughput
- Computed from the port usage: 2.00
- Measured (loop): 10.00
- Measured (unrolled): 10.00
Number of μops
- Executed: 3
- Retire slots: 3
- Decoded (MITE): 3
- Microcode Sequencer (MS): 0
- Requires the complex decoder (2 other instructions can be decoded with simple decoders in the same cycle)
Port usage: 2*p0+1*p05

Latencies
- Latency operand 2 → 1: ≤18
- Latency operand 3 → 1: ≤18
Throughput
- Computed from the port usage: 2.00
- Measured (loop): 10.00
- Measured (unrolled): 10.00
Number of μops
- Executed: 3
- Retire slots: 3
- Decoded (MITE): 3
- Microcode Sequencer (MS): 0
- Requires the complex decoder (2 other instructions can be decoded with simple decoders in the same cycle)
Port usage: 2*p0+1*p05

Latencies
- Latency operand 2 → 1: ≤17
- Latency operand 3 → 1: ≤17
Throughput
- Computed from the port usage: 2.00
- Measured (loop): 10.00
- Measured (unrolled): 10.00
Number of μops
- Executed: 3
- Retire slots: 3
- Decoded (MITE): 3
- Microcode Sequencer (MS): 0
- Requires the complex decoder (2 other instructions can be decoded with simple decoders in the same cycle)
Port usage: 2*p0+1*p05

Latencies
- Latency operand 2 → 1: ≤18
- Latency operand 3 → 1: ≤18
Throughput
- Computed from the port usage: 2.00
- Measured (loop): 10.00
- Measured (unrolled): 10.00
Number of μops
- Executed: 3
- Retire slots: 3
- Decoded (MITE): 3
- Microcode Sequencer (MS): 0
- Requires the complex decoder (2 other instructions can be decoded with simple decoders in the same cycle)
Port usage: 2*p0+1*p05

Latencies
- Latency operand 2 → 1: ≤11
- Latency operand 3 → 1: ≤11
Throughput
- Computed from the port usage: 0.50
- Measured (loop): 6.00
- Measured (unrolled): 6.00
Number of μops
- Executed: 1
Port usage: 1*FP01