VPSRAD (YMM, YMM, I8) - Latency

Experiment 1

• Instruction: VPSRAD YMM1, YMM0, 2
• Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0
• Chain latency: 5
• Code:

     0:	c5 f5 72 e0 02       	vpsrad ymm1,ymm0,0x2
     5:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
     a:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
     f:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
    14:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
    19:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 7.29
  • Reference cycles: 7.52
  • UOPS_RETIRED.ALL: 12.0

Experiment 2

• Instruction: VPSRAD YMM1, YMM0, 2
• Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0
• Chain latency: 5
• Code:

     0:	c5 f5 72 e0 02       	vpsrad ymm1,ymm0,0x2
     5:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
     9:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
     d:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
    11:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
    15:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 7.31
  • Reference cycles: 7.68
  • UOPS_RETIRED.ALL: 12.0

Experiment 3 (source registers initialized by an instruction of the same kind)

• Instruction: VPSRAD YMM1, YMM0, 2
• Chain instructions: VSHUFPD YMM0, YMM1, YMM1, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0;VSHUFPD YMM0, YMM0, YMM0, 0
• Chain latency: 5
• Code:

     0:	c5 f5 72 e0 02       	vpsrad ymm1,ymm0,0x2
     5:	c5 f5 c6 c1 00       	vshufpd ymm0,ymm1,ymm1,0x0
     a:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
     f:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
    14:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
    19:	c5 fd c6 c0 00       	vshufpd ymm0,ymm0,ymm0,0x0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  VPSRAD YMM0, YMM1, 2

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 7.16
  • Reference cycles: 6.88
  • UOPS_RETIRED.ALL: 12.0

Experiment 4 (source registers initialized by an instruction of the same kind)

• Instruction: VPSRAD YMM1, YMM0, 2
• Chain instructions: VPAND YMM0, YMM1, YMM1;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0;VPAND YMM0, YMM0, YMM0
• Chain latency: 5
• Code:

     0:	c5 f5 72 e0 02       	vpsrad ymm1,ymm0,0x2
     5:	c5 f5 db c1          	vpand  ymm0,ymm1,ymm1
     9:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
     d:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
    11:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
    15:	c5 fd db c0          	vpand  ymm0,ymm0,ymm0
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  VXORPS YMM0, YMM0, YMM0;
  VPSRAD YMM0, YMM1, 2

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 7.15
  • Reference cycles: 7.04
  • UOPS_RETIRED.ALL: 12.0