JMP (M64) - Port Usage

With blocking instructions for port '1':

Code:

   0:	66 f2 45 0f 38 f1 c1 	crc32  r8d,r9w
   7:	66 f2 45 0f 38 f1 d1 	crc32  r10d,r9w
   e:	66 f2 45 0f 38 f1 d9 	crc32  r11d,r9w
  15:	66 f2 45 0f 38 f1 e1 	crc32  r12d,r9w
  1c:	66 f2 41 0f 38 f1 d9 	crc32  ebx,r9w
  23:	66 f2 41 0f 38 f1 c9 	crc32  ecx,r9w
  2a:	66 f2 41 0f 38 f1 d1 	crc32  edx,r9w
  31:	66 f2 45 0f 38 f1 c1 	crc32  r8d,r9w
  38:	66 f2 45 0f 38 f1 d1 	crc32  r10d,r9w
  3f:	66 f2 45 0f 38 f1 d9 	crc32  r11d,r9w
  46:	48 8d 05 06 00 00 00 	lea    rax,[rip+0x6]        # 0x53
  4d:	49 89 06             	mov    QWORD PTR [r14],rax
  50:	41 ff 26             	jmp    QWORD PTR [r14]

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 11.4
- Reference cycles: 3.77
- UOPS_PORT_1: 11.0

With blocking instructions for port '23':

Code:

   0:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
   6:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
   c:	f2 41 0f f0 56 60    	lddqu  xmm2,[r14+0x60]
  12:	f2 41 0f f0 5e 70    	lddqu  xmm3,[r14+0x70]
  18:	f2 41 0f f0 a6 80 00 	lddqu  xmm4,[r14+0x80]
  1f:	00 00 
  21:	f2 41 0f f0 ae 90 00 	lddqu  xmm5,[r14+0x90]
  28:	00 00 
  2a:	f2 41 0f f0 b6 a0 00 	lddqu  xmm6,[r14+0xa0]
  31:	00 00 
  33:	f2 41 0f f0 be b0 00 	lddqu  xmm7,[r14+0xb0]
  3a:	00 00 
  3c:	f2 45 0f f0 86 c0 00 	lddqu  xmm8,[r14+0xc0]
  43:	00 00 
  45:	f2 45 0f f0 8e d0 00 	lddqu  xmm9,[r14+0xd0]
  4c:	00 00 
  4e:	48 8d 05 06 00 00 00 	lea    rax,[rip+0x6]        # 0x5b
  55:	49 89 06             	mov    QWORD PTR [r14],rax
  58:	41 ff 26             	jmp    QWORD PTR [r14]

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 5.58
- Reference cycles: 1.86
- UOPS_PORT_23: 11.0

⇨ One μop that can only use port '23'

With blocking instructions for port '49':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	48 8d 05 06 00 00 00 	lea    rax,[rip+0x6]        # 0x3b
  35:	49 89 06             	mov    QWORD PTR [r14],rax
  38:	41 ff 26             	jmp    QWORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 6.04
- Reference cycles: 1.96
- UOPS_PORT_49: 11.0

With blocking instructions for port '78':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	48 8d 05 06 00 00 00 	lea    rax,[rip+0x6]        # 0x3b
  35:	49 89 06             	mov    QWORD PTR [r14],rax
  38:	41 ff 26             	jmp    QWORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 6.04
- Reference cycles: 1.91
- UOPS_PORT_78: 11.0

With blocking instructions for ports {'0', '1'}:

Code:

   0:	66 0f 58 c1          	addpd  xmm0,xmm1
   4:	66 0f 58 d1          	addpd  xmm2,xmm1
   8:	66 0f 58 d9          	addpd  xmm3,xmm1
   c:	66 0f 58 e1          	addpd  xmm4,xmm1
  10:	66 0f 58 e9          	addpd  xmm5,xmm1
  14:	66 0f 58 f1          	addpd  xmm6,xmm1
  18:	66 0f 58 f9          	addpd  xmm7,xmm1
  1c:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  21:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  26:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  2b:	48 8d 05 06 00 00 00 	lea    rax,[rip+0x6]        # 0x38
  32:	49 89 06             	mov    QWORD PTR [r14],rax
  35:	41 ff 26             	jmp    QWORD PTR [r14]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 5.68
- Reference cycles: 2.17
- UOPS_PORT_0: 5.45
- UOPS_PORT_1: 5.54

With blocking instructions for ports {'0', '6'}:

Code:

   0:	66 41 c1 c0 00       	rol    r8w,0x0
   5:	66 41 c1 c1 00       	rol    r9w,0x0
   a:	66 41 c1 c2 00       	rol    r10w,0x0
   f:	66 41 c1 c3 00       	rol    r11w,0x0
  14:	66 41 c1 c4 00       	rol    r12w,0x0
  19:	66 c1 c3 00          	rol    bx,0x0
  1d:	66 c1 c1 00          	rol    cx,0x0
  21:	66 c1 c2 00          	rol    dx,0x0
  25:	66 41 c1 c0 00       	rol    r8w,0x0
  2a:	66 41 c1 c1 00       	rol    r9w,0x0
  2f:	48 8d 05 06 00 00 00 	lea    rax,[rip+0x6]        # 0x3c
  36:	49 89 06             	mov    QWORD PTR [r14],rax
  39:	41 ff 26             	jmp    QWORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 5.56
- Reference cycles: 1.81
- UOPS_PORT_0: 5.49
- UOPS_PORT_6: 5.51

⇨ One μop that can only use ports {'0', '6'}

With an indexed addressing mode

With blocking instructions for port '1':

Code:

   0:	66 f2 45 0f 38 f1 c1 	crc32  r8d,r9w
   7:	66 f2 45 0f 38 f1 d1 	crc32  r10d,r9w
   e:	66 f2 45 0f 38 f1 d9 	crc32  r11d,r9w
  15:	66 f2 45 0f 38 f1 e1 	crc32  r12d,r9w
  1c:	66 f2 41 0f 38 f1 d9 	crc32  ebx,r9w
  23:	66 f2 41 0f 38 f1 c9 	crc32  ecx,r9w
  2a:	66 f2 41 0f 38 f1 d1 	crc32  edx,r9w
  31:	66 f2 45 0f 38 f1 c1 	crc32  r8d,r9w
  38:	66 f2 45 0f 38 f1 d1 	crc32  r10d,r9w
  3f:	66 f2 45 0f 38 f1 d9 	crc32  r11d,r9w
  46:	48 8d 05 06 00 00 00 	lea    rax,[rip+0x6]        # 0x53
  4d:	49 89 06             	mov    QWORD PTR [r14],rax
  50:	41 ff 26             	jmp    QWORD PTR [r14]

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 11.41
- Reference cycles: 3.77
- UOPS_PORT_1: 11.01

With blocking instructions for port '23':

Code:

   0:	f2 41 0f f0 46 40    	lddqu  xmm0,[r14+0x40]
   6:	f2 41 0f f0 4e 50    	lddqu  xmm1,[r14+0x50]
   c:	f2 41 0f f0 56 60    	lddqu  xmm2,[r14+0x60]
  12:	f2 41 0f f0 5e 70    	lddqu  xmm3,[r14+0x70]
  18:	f2 41 0f f0 a6 80 00 	lddqu  xmm4,[r14+0x80]
  1f:	00 00 
  21:	f2 41 0f f0 ae 90 00 	lddqu  xmm5,[r14+0x90]
  28:	00 00 
  2a:	f2 41 0f f0 b6 a0 00 	lddqu  xmm6,[r14+0xa0]
  31:	00 00 
  33:	f2 41 0f f0 be b0 00 	lddqu  xmm7,[r14+0xb0]
  3a:	00 00 
  3c:	f2 45 0f f0 86 c0 00 	lddqu  xmm8,[r14+0xc0]
  43:	00 00 
  45:	f2 45 0f f0 8e d0 00 	lddqu  xmm9,[r14+0xd0]
  4c:	00 00 
  4e:	48 8d 05 06 00 00 00 	lea    rax,[rip+0x6]        # 0x5b
  55:	49 89 06             	mov    QWORD PTR [r14],rax
  58:	41 ff 26             	jmp    QWORD PTR [r14]

Init:
```
VZEROALL
```
Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 5.58
- Reference cycles: 1.91
- UOPS_PORT_23: 11.0

⇨ One μop that can only use port '23'

With blocking instructions for port '49':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	48 8d 05 06 00 00 00 	lea    rax,[rip+0x6]        # 0x3b
  35:	49 89 06             	mov    QWORD PTR [r14],rax
  38:	41 ff 26             	jmp    QWORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 6.02
- Reference cycles: 1.86
- UOPS_PORT_49: 11.0

With blocking instructions for port '78':

Code:

   0:	4d 89 46 40          	mov    QWORD PTR [r14+0x40],r8
   4:	4d 89 46 48          	mov    QWORD PTR [r14+0x48],r8
   8:	4d 89 46 50          	mov    QWORD PTR [r14+0x50],r8
   c:	4d 89 46 58          	mov    QWORD PTR [r14+0x58],r8
  10:	4d 89 46 60          	mov    QWORD PTR [r14+0x60],r8
  14:	4d 89 46 68          	mov    QWORD PTR [r14+0x68],r8
  18:	4d 89 46 70          	mov    QWORD PTR [r14+0x70],r8
  1c:	4d 89 46 78          	mov    QWORD PTR [r14+0x78],r8
  20:	4d 89 86 80 00 00 00 	mov    QWORD PTR [r14+0x80],r8
  27:	4d 89 86 88 00 00 00 	mov    QWORD PTR [r14+0x88],r8
  2e:	48 8d 05 06 00 00 00 	lea    rax,[rip+0x6]        # 0x3b
  35:	49 89 06             	mov    QWORD PTR [r14],rax
  38:	41 ff 26             	jmp    QWORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 6.06
- Reference cycles: 1.86
- UOPS_PORT_78: 11.0

With blocking instructions for ports {'0', '1'}:

Code:

   0:	66 0f 58 c1          	addpd  xmm0,xmm1
   4:	66 0f 58 d1          	addpd  xmm2,xmm1
   8:	66 0f 58 d9          	addpd  xmm3,xmm1
   c:	66 0f 58 e1          	addpd  xmm4,xmm1
  10:	66 0f 58 e9          	addpd  xmm5,xmm1
  14:	66 0f 58 f1          	addpd  xmm6,xmm1
  18:	66 0f 58 f9          	addpd  xmm7,xmm1
  1c:	66 44 0f 58 c1       	addpd  xmm8,xmm1
  21:	66 44 0f 58 c9       	addpd  xmm9,xmm1
  26:	66 44 0f 58 d1       	addpd  xmm10,xmm1
  2b:	48 8d 05 06 00 00 00 	lea    rax,[rip+0x6]        # 0x38
  32:	49 89 06             	mov    QWORD PTR [r14],rax
  35:	41 ff 26             	jmp    QWORD PTR [r14]

Init:

VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOVUPD XMM0, [R14];
MOVUPD XMM1, [R14];
MOVUPD XMM2, [R14];
MOVUPD XMM3, [R14];
MOVUPD XMM4, [R14];
MOVUPD XMM5, [R14];
MOVUPD XMM6, [R14];
MOVUPD XMM7, [R14];
MOVUPD XMM8, [R14];
MOVUPD XMM9, [R14];
MOVUPD XMM10, [R14];
MOVUPD XMM11, [R14];
MOVUPD XMM12, [R14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 5.74
- Reference cycles: 2.17
- UOPS_PORT_0: 5.45
- UOPS_PORT_1: 5.55

With blocking instructions for ports {'0', '6'}:

Code:

   0:	66 41 c1 c0 00       	rol    r8w,0x0
   5:	66 41 c1 c1 00       	rol    r9w,0x0
   a:	66 41 c1 c2 00       	rol    r10w,0x0
   f:	66 41 c1 c3 00       	rol    r11w,0x0
  14:	66 41 c1 c4 00       	rol    r12w,0x0
  19:	66 c1 c3 00          	rol    bx,0x0
  1d:	66 c1 c1 00          	rol    cx,0x0
  21:	66 c1 c2 00          	rol    dx,0x0
  25:	66 41 c1 c0 00       	rol    r8w,0x0
  2a:	66 41 c1 c1 00       	rol    r9w,0x0
  2f:	48 8d 05 06 00 00 00 	lea    rax,[rip+0x6]        # 0x3c
  36:	49 89 06             	mov    QWORD PTR [r14],rax
  39:	41 ff 26             	jmp    QWORD PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 5.57
- Reference cycles: 1.86
- UOPS_PORT_0: 5.49
- UOPS_PORT_6: 5.53

⇨ One μop that can only use ports {'0', '6'}