VBLENDVPS (YMM, YMM, YMM, YMM) - Port Usage

With blocking instructions for port '0':

Code:

   0:	41 0f 7e c0          	movd   r8d,mm0
   4:	41 0f 7e c1          	movd   r9d,mm0
   8:	41 0f 7e c2          	movd   r10d,mm0
   c:	41 0f 7e c3          	movd   r11d,mm0
  10:	41 0f 7e c4          	movd   r12d,mm0
  14:	0f 7e c3             	movd   ebx,mm0
  17:	0f 7e c1             	movd   ecx,mm0
  1a:	0f 7e c2             	movd   edx,mm0
  1d:	41 0f 7e c0          	movd   r8d,mm0
  21:	41 0f 7e c1          	movd   r9d,mm0
  25:	c4 e3 75 4a c2 30    	vblendvps ymm0,ymm1,ymm2,ymm3

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
PXOR MM0, MM0;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM2, [R14];
VXORPS YMM3, YMM3, YMM3

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 10.05
- Reference cycles: 9.92
- UOPS_PORT_0: 10.0

With blocking instructions for port '5':

Code:

   0:	41 0f 6e c0          	movd   mm0,r8d
   4:	41 0f 6e c8          	movd   mm1,r8d
   8:	41 0f 6e d0          	movd   mm2,r8d
   c:	41 0f 6e d8          	movd   mm3,r8d
  10:	41 0f 6e e0          	movd   mm4,r8d
  14:	41 0f 6e e8          	movd   mm5,r8d
  18:	41 0f 6e f0          	movd   mm6,r8d
  1c:	41 0f 6e f8          	movd   mm7,r8d
  20:	41 0f 6e c0          	movd   mm0,r8d
  24:	41 0f 6e c8          	movd   mm1,r8d
  28:	c4 e3 75 4a c2 30    	vblendvps ymm0,ymm1,ymm2,ymm3

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM2, [R14];
VXORPS YMM3, YMM3, YMM3

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 10.04
- Reference cycles: 9.81
- UOPS_PORT_5: 10.0

With blocking instructions for ports {'0', '1'}:

Code:

   0:	45 8d 06             	lea    r8d,[r14]
   3:	45 8d 0e             	lea    r9d,[r14]
   6:	45 8d 16             	lea    r10d,[r14]
   9:	45 8d 1e             	lea    r11d,[r14]
   c:	45 8d 26             	lea    r12d,[r14]
   f:	41 8d 1e             	lea    ebx,[r14]
  12:	41 8d 0e             	lea    ecx,[r14]
  15:	41 8d 16             	lea    edx,[r14]
  18:	45 8d 06             	lea    r8d,[r14]
  1b:	45 8d 0e             	lea    r9d,[r14]
  1e:	c4 e3 75 4a c2 30    	vblendvps ymm0,ymm1,ymm2,ymm3

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM2, [R14];
VXORPS YMM3, YMM3, YMM3

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 5.05
- Reference cycles: 5.01
- UOPS_PORT_0: 5.0
- UOPS_PORT_1: 4.99

With blocking instructions for ports {'0', '5'}:

Code:

   0:	66 41 c1 c0 00       	rol    r8w,0x0
   5:	66 41 c1 c1 00       	rol    r9w,0x0
   a:	66 41 c1 c2 00       	rol    r10w,0x0
   f:	66 41 c1 c3 00       	rol    r11w,0x0
  14:	66 41 c1 c4 00       	rol    r12w,0x0
  19:	66 c1 c3 00          	rol    bx,0x0
  1d:	66 c1 c1 00          	rol    cx,0x0
  21:	66 c1 c2 00          	rol    dx,0x0
  25:	66 41 c1 c0 00       	rol    r8w,0x0
  2a:	66 41 c1 c1 00       	rol    r9w,0x0
  2f:	c4 e3 75 4a c2 30    	vblendvps ymm0,ymm1,ymm2,ymm3

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
MOV RAX, 0x4000000040000000;
MOV [R14+0], RAX;
MOV [R14+8], RAX;
MOV [R14+16], RAX;
MOV [R14+24], RAX;
VMOVUPD YMM1, [R14];
VMOVUPD YMM2, [R14];
VXORPS YMM3, YMM3, YMM3

Show nanoBench command
Results:
- Instructions retired: 11.0
- Core cycles: 6.05
- Reference cycles: 5.92
- UOPS_PORT_5: 6.0
- UOPS_PORT_0: 6.0

⇨ 2 μops that can only use ports {'0', '5'}