VPSRAD (YMM, YMM, I8)

With unroll_count=500 and no inner loop

Code:

   0:	c5 fd 72 e1 02       	vpsrad ymm0,ymm1,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 0.67
- Reference cycles: 0.77
- UOPS_RETIRED.ALL: 2.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=10

Code:

   0:	c5 fd 72 e1 02       	vpsrad ymm0,ymm1,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 0.67
- Reference cycles: 0.68
- UOPS_RETIRED.ALL: 2.2
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	c5 fd 72 e1 02       	vpsrad ymm0,ymm1,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 0.67
- Reference cycles: 0.68
- UOPS_RETIRED.ALL: 2.02
- UOPS_MS: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	c5 fd 72 e1 02       	vpsrad ymm0,ymm1,0x2
   5:	c5 ed 72 e1 02       	vpsrad ymm2,ymm1,0x2
   a:	c5 e5 72 e1 02       	vpsrad ymm3,ymm1,0x2
   f:	c5 dd 72 e1 02       	vpsrad ymm4,ymm1,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 2.67
- Reference cycles: 2.72
- UOPS_RETIRED.ALL: 8.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=2

Code:

   0:	c5 fd 72 e1 02       	vpsrad ymm0,ymm1,0x2
   5:	c5 ed 72 e1 02       	vpsrad ymm2,ymm1,0x2
   a:	c5 e5 72 e1 02       	vpsrad ymm3,ymm1,0x2
   f:	c5 dd 72 e1 02       	vpsrad ymm4,ymm1,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 2.68
- Reference cycles: 2.74
- UOPS_RETIRED.ALL: 9.0
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	c5 fd 72 e1 02       	vpsrad ymm0,ymm1,0x2
   5:	c5 ed 72 e1 02       	vpsrad ymm2,ymm1,0x2
   a:	c5 e5 72 e1 02       	vpsrad ymm3,ymm1,0x2
   f:	c5 dd 72 e1 02       	vpsrad ymm4,ymm1,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 2.68
- Reference cycles: 2.73
- UOPS_RETIRED.ALL: 8.1
- UOPS_MS: 0.0

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c5 fd 72 e1 02       	vpsrad ymm0,ymm1,0x2
   5:	c5 ed 72 e1 02       	vpsrad ymm2,ymm1,0x2
   a:	c5 e5 72 e1 02       	vpsrad ymm3,ymm1,0x2
   f:	c5 dd 72 e1 02       	vpsrad ymm4,ymm1,0x2
  14:	c5 d5 72 e1 02       	vpsrad ymm5,ymm1,0x2
  19:	c5 cd 72 e1 02       	vpsrad ymm6,ymm1,0x2
  1e:	c5 c5 72 e1 02       	vpsrad ymm7,ymm1,0x2
  23:	c5 bd 72 e1 02       	vpsrad ymm8,ymm1,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 5.37
- Reference cycles: 5.44
- UOPS_RETIRED.ALL: 16.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	c5 fd 72 e1 02       	vpsrad ymm0,ymm1,0x2
   5:	c5 ed 72 e1 02       	vpsrad ymm2,ymm1,0x2
   a:	c5 e5 72 e1 02       	vpsrad ymm3,ymm1,0x2
   f:	c5 dd 72 e1 02       	vpsrad ymm4,ymm1,0x2
  14:	c5 d5 72 e1 02       	vpsrad ymm5,ymm1,0x2
  19:	c5 cd 72 e1 02       	vpsrad ymm6,ymm1,0x2
  1e:	c5 c5 72 e1 02       	vpsrad ymm7,ymm1,0x2
  23:	c5 bd 72 e1 02       	vpsrad ymm8,ymm1,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 5.35
- Reference cycles: 5.49
- UOPS_RETIRED.ALL: 18.0
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	c5 fd 72 e1 02       	vpsrad ymm0,ymm1,0x2
   5:	c5 ed 72 e1 02       	vpsrad ymm2,ymm1,0x2
   a:	c5 e5 72 e1 02       	vpsrad ymm3,ymm1,0x2
   f:	c5 dd 72 e1 02       	vpsrad ymm4,ymm1,0x2
  14:	c5 d5 72 e1 02       	vpsrad ymm5,ymm1,0x2
  19:	c5 cd 72 e1 02       	vpsrad ymm6,ymm1,0x2
  1e:	c5 c5 72 e1 02       	vpsrad ymm7,ymm1,0x2
  23:	c5 bd 72 e1 02       	vpsrad ymm8,ymm1,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 5.35
- Reference cycles: 5.5
- UOPS_RETIRED.ALL: 16.2
- UOPS_MS: 0.0

With 12 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c5 fd 72 e1 02       	vpsrad ymm0,ymm1,0x2
   5:	c5 ed 72 e1 02       	vpsrad ymm2,ymm1,0x2
   a:	c5 e5 72 e1 02       	vpsrad ymm3,ymm1,0x2
   f:	c5 dd 72 e1 02       	vpsrad ymm4,ymm1,0x2
  14:	c5 d5 72 e1 02       	vpsrad ymm5,ymm1,0x2
  19:	c5 cd 72 e1 02       	vpsrad ymm6,ymm1,0x2
  1e:	c5 c5 72 e1 02       	vpsrad ymm7,ymm1,0x2
  23:	c5 bd 72 e1 02       	vpsrad ymm8,ymm1,0x2
  28:	c5 b5 72 e1 02       	vpsrad ymm9,ymm1,0x2
  2d:	c5 ad 72 e1 02       	vpsrad ymm10,ymm1,0x2
  32:	c5 a5 72 e1 02       	vpsrad ymm11,ymm1,0x2
  37:	c5 9d 72 e1 02       	vpsrad ymm12,ymm1,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 8.02
- Reference cycles: 8.0
- UOPS_RETIRED.ALL: 24.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	c5 fd 72 e1 02       	vpsrad ymm0,ymm1,0x2
   5:	c5 ed 72 e1 02       	vpsrad ymm2,ymm1,0x2
   a:	c5 e5 72 e1 02       	vpsrad ymm3,ymm1,0x2
   f:	c5 dd 72 e1 02       	vpsrad ymm4,ymm1,0x2
  14:	c5 d5 72 e1 02       	vpsrad ymm5,ymm1,0x2
  19:	c5 cd 72 e1 02       	vpsrad ymm6,ymm1,0x2
  1e:	c5 c5 72 e1 02       	vpsrad ymm7,ymm1,0x2
  23:	c5 bd 72 e1 02       	vpsrad ymm8,ymm1,0x2
  28:	c5 b5 72 e1 02       	vpsrad ymm9,ymm1,0x2
  2d:	c5 ad 72 e1 02       	vpsrad ymm10,ymm1,0x2
  32:	c5 a5 72 e1 02       	vpsrad ymm11,ymm1,0x2
  37:	c5 9d 72 e1 02       	vpsrad ymm12,ymm1,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 8.02
- Reference cycles: 8.19
- UOPS_RETIRED.ALL: 26.0
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	c5 fd 72 e1 02       	vpsrad ymm0,ymm1,0x2
   5:	c5 ed 72 e1 02       	vpsrad ymm2,ymm1,0x2
   a:	c5 e5 72 e1 02       	vpsrad ymm3,ymm1,0x2
   f:	c5 dd 72 e1 02       	vpsrad ymm4,ymm1,0x2
  14:	c5 d5 72 e1 02       	vpsrad ymm5,ymm1,0x2
  19:	c5 cd 72 e1 02       	vpsrad ymm6,ymm1,0x2
  1e:	c5 c5 72 e1 02       	vpsrad ymm7,ymm1,0x2
  23:	c5 bd 72 e1 02       	vpsrad ymm8,ymm1,0x2
  28:	c5 b5 72 e1 02       	vpsrad ymm9,ymm1,0x2
  2d:	c5 ad 72 e1 02       	vpsrad ymm10,ymm1,0x2
  32:	c5 a5 72 e1 02       	vpsrad ymm11,ymm1,0x2
  37:	c5 9d 72 e1 02       	vpsrad ymm12,ymm1,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM1, YMM1, YMM1

Show nanoBench command
Results:
- Instructions retired: 12.2
- Core cycles: 8.02
- Reference cycles: 8.19
- UOPS_RETIRED.ALL: 24.2
- UOPS_MS: 0.0

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	c5 fd 72 e0 02       	vpsrad ymm0,ymm0,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 1.19
- Reference cycles: 1.22
- UOPS_RETIRED.ALL: 2.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=10

Code:

   0:	c5 fd 72 e0 02       	vpsrad ymm0,ymm0,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 1.23
- Reference cycles: 1.26
- UOPS_RETIRED.ALL: 2.2
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	c5 fd 72 e0 02       	vpsrad ymm0,ymm0,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 1.2
- Reference cycles: 1.23
- UOPS_RETIRED.ALL: 2.02
- UOPS_MS: 0.0

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	c5 fd 72 e0 02       	vpsrad ymm0,ymm0,0x2
   5:	c5 f5 72 e1 02       	vpsrad ymm1,ymm1,0x2
   a:	c5 ed 72 e2 02       	vpsrad ymm2,ymm2,0x2
   f:	c5 e5 72 e3 02       	vpsrad ymm3,ymm3,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 2.88
- Reference cycles: 3.12
- UOPS_RETIRED.ALL: 8.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=2

Code:

   0:	c5 fd 72 e0 02       	vpsrad ymm0,ymm0,0x2
   5:	c5 f5 72 e1 02       	vpsrad ymm1,ymm1,0x2
   a:	c5 ed 72 e2 02       	vpsrad ymm2,ymm2,0x2
   f:	c5 e5 72 e3 02       	vpsrad ymm3,ymm3,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 2.7
- Reference cycles: 2.74
- UOPS_RETIRED.ALL: 9.0
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	c5 fd 72 e0 02       	vpsrad ymm0,ymm0,0x2
   5:	c5 f5 72 e1 02       	vpsrad ymm1,ymm1,0x2
   a:	c5 ed 72 e2 02       	vpsrad ymm2,ymm2,0x2
   f:	c5 e5 72 e3 02       	vpsrad ymm3,ymm3,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 2.87
- Reference cycles: 2.94
- UOPS_RETIRED.ALL: 8.1
- UOPS_MS: 0.0

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c5 fd 72 e0 02       	vpsrad ymm0,ymm0,0x2
   5:	c5 f5 72 e1 02       	vpsrad ymm1,ymm1,0x2
   a:	c5 ed 72 e2 02       	vpsrad ymm2,ymm2,0x2
   f:	c5 e5 72 e3 02       	vpsrad ymm3,ymm3,0x2
  14:	c5 dd 72 e4 02       	vpsrad ymm4,ymm4,0x2
  19:	c5 d5 72 e5 02       	vpsrad ymm5,ymm5,0x2
  1e:	c5 cd 72 e6 02       	vpsrad ymm6,ymm6,0x2
  23:	c5 c5 72 e7 02       	vpsrad ymm7,ymm7,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 5.37
- Reference cycles: 5.6
- UOPS_RETIRED.ALL: 16.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	c5 fd 72 e0 02       	vpsrad ymm0,ymm0,0x2
   5:	c5 f5 72 e1 02       	vpsrad ymm1,ymm1,0x2
   a:	c5 ed 72 e2 02       	vpsrad ymm2,ymm2,0x2
   f:	c5 e5 72 e3 02       	vpsrad ymm3,ymm3,0x2
  14:	c5 dd 72 e4 02       	vpsrad ymm4,ymm4,0x2
  19:	c5 d5 72 e5 02       	vpsrad ymm5,ymm5,0x2
  1e:	c5 cd 72 e6 02       	vpsrad ymm6,ymm6,0x2
  23:	c5 c5 72 e7 02       	vpsrad ymm7,ymm7,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 5.35
- Reference cycles: 5.47
- UOPS_RETIRED.ALL: 18.0
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	c5 fd 72 e0 02       	vpsrad ymm0,ymm0,0x2
   5:	c5 f5 72 e1 02       	vpsrad ymm1,ymm1,0x2
   a:	c5 ed 72 e2 02       	vpsrad ymm2,ymm2,0x2
   f:	c5 e5 72 e3 02       	vpsrad ymm3,ymm3,0x2
  14:	c5 dd 72 e4 02       	vpsrad ymm4,ymm4,0x2
  19:	c5 d5 72 e5 02       	vpsrad ymm5,ymm5,0x2
  1e:	c5 cd 72 e6 02       	vpsrad ymm6,ymm6,0x2
  23:	c5 c5 72 e7 02       	vpsrad ymm7,ymm7,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 5.35
- Reference cycles: 5.44
- UOPS_RETIRED.ALL: 16.2
- UOPS_MS: 0.0

With 13 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	c5 fd 72 e0 02       	vpsrad ymm0,ymm0,0x2
   5:	c5 f5 72 e1 02       	vpsrad ymm1,ymm1,0x2
   a:	c5 ed 72 e2 02       	vpsrad ymm2,ymm2,0x2
   f:	c5 e5 72 e3 02       	vpsrad ymm3,ymm3,0x2
  14:	c5 dd 72 e4 02       	vpsrad ymm4,ymm4,0x2
  19:	c5 d5 72 e5 02       	vpsrad ymm5,ymm5,0x2
  1e:	c5 cd 72 e6 02       	vpsrad ymm6,ymm6,0x2
  23:	c5 c5 72 e7 02       	vpsrad ymm7,ymm7,0x2
  28:	c4 c1 3d 72 e0 02    	vpsrad ymm8,ymm8,0x2
  2e:	c4 c1 35 72 e1 02    	vpsrad ymm9,ymm9,0x2
  34:	c4 c1 2d 72 e2 02    	vpsrad ymm10,ymm10,0x2
  3a:	c4 c1 25 72 e3 02    	vpsrad ymm11,ymm11,0x2
  40:	c4 c1 1d 72 e4 02    	vpsrad ymm12,ymm12,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8;
VXORPS YMM9, YMM9, YMM9;
VXORPS YMM10, YMM10, YMM10;
VXORPS YMM11, YMM11, YMM11;
VXORPS YMM12, YMM12, YMM12

Show nanoBench command
Results:
- Instructions retired: 13.0
- Core cycles: 8.65
- Reference cycles: 8.64
- UOPS_RETIRED.ALL: 26.0
- UOPS_MS: 0.0

With loop_count=1000 and unroll_count=1

Code:

   0:	c5 fd 72 e0 02       	vpsrad ymm0,ymm0,0x2
   5:	c5 f5 72 e1 02       	vpsrad ymm1,ymm1,0x2
   a:	c5 ed 72 e2 02       	vpsrad ymm2,ymm2,0x2
   f:	c5 e5 72 e3 02       	vpsrad ymm3,ymm3,0x2
  14:	c5 dd 72 e4 02       	vpsrad ymm4,ymm4,0x2
  19:	c5 d5 72 e5 02       	vpsrad ymm5,ymm5,0x2
  1e:	c5 cd 72 e6 02       	vpsrad ymm6,ymm6,0x2
  23:	c5 c5 72 e7 02       	vpsrad ymm7,ymm7,0x2
  28:	c4 c1 3d 72 e0 02    	vpsrad ymm8,ymm8,0x2
  2e:	c4 c1 35 72 e1 02    	vpsrad ymm9,ymm9,0x2
  34:	c4 c1 2d 72 e2 02    	vpsrad ymm10,ymm10,0x2
  3a:	c4 c1 25 72 e3 02    	vpsrad ymm11,ymm11,0x2
  40:	c4 c1 1d 72 e4 02    	vpsrad ymm12,ymm12,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8;
VXORPS YMM9, YMM9, YMM9;
VXORPS YMM10, YMM10, YMM10;
VXORPS YMM11, YMM11, YMM11;
VXORPS YMM12, YMM12, YMM12

Show nanoBench command
Results:
- Instructions retired: 15.0
- Core cycles: 8.69
- Reference cycles: 8.85
- UOPS_RETIRED.ALL: 28.0
- UOPS_MS: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	c5 fd 72 e0 02       	vpsrad ymm0,ymm0,0x2
   5:	c5 f5 72 e1 02       	vpsrad ymm1,ymm1,0x2
   a:	c5 ed 72 e2 02       	vpsrad ymm2,ymm2,0x2
   f:	c5 e5 72 e3 02       	vpsrad ymm3,ymm3,0x2
  14:	c5 dd 72 e4 02       	vpsrad ymm4,ymm4,0x2
  19:	c5 d5 72 e5 02       	vpsrad ymm5,ymm5,0x2
  1e:	c5 cd 72 e6 02       	vpsrad ymm6,ymm6,0x2
  23:	c5 c5 72 e7 02       	vpsrad ymm7,ymm7,0x2
  28:	c4 c1 3d 72 e0 02    	vpsrad ymm8,ymm8,0x2
  2e:	c4 c1 35 72 e1 02    	vpsrad ymm9,ymm9,0x2
  34:	c4 c1 2d 72 e2 02    	vpsrad ymm10,ymm10,0x2
  3a:	c4 c1 25 72 e3 02    	vpsrad ymm11,ymm11,0x2
  40:	c4 c1 1d 72 e4 02    	vpsrad ymm12,ymm12,0x2

Init:

MOV R15, 10000;
L: VADDPS YMM0, YMM1, YMM1;
VADDPS YMM0, YMM1, YMM1;
DEC R15;
JNZ L;
VZEROALL;
VXORPS YMM0, YMM0, YMM0;
VXORPS YMM1, YMM1, YMM1;
VXORPS YMM2, YMM2, YMM2;
VXORPS YMM3, YMM3, YMM3;
VXORPS YMM4, YMM4, YMM4;
VXORPS YMM5, YMM5, YMM5;
VXORPS YMM6, YMM6, YMM6;
VXORPS YMM7, YMM7, YMM7;
VXORPS YMM8, YMM8, YMM8;
VXORPS YMM9, YMM9, YMM9;
VXORPS YMM10, YMM10, YMM10;
VXORPS YMM11, YMM11, YMM11;
VXORPS YMM12, YMM12, YMM12

Show nanoBench command
Results:
- Instructions retired: 13.2
- Core cycles: 8.69
- Reference cycles: 8.94
- UOPS_RETIRED.ALL: 26.2
- UOPS_MS: 0.0

VPSRAD (YMM, YMM, I8) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 12 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With the same register for for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 13 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10