INVLPG (M8) - Throughput and Uops

With a non-indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	41 0f 01 3e          	invlpg BYTE PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 384.75
- Reference cycles: 324.34
- UOPS_RETIRED.ALL: 103.0
- UOPS_MS: 103.0

With loop_count=10 and unroll_count=1

Code:

   0:	41 0f 01 3e          	invlpg BYTE PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 389.08
- Reference cycles: 323.2
- UOPS_RETIRED.ALL: 105.0
- UOPS_MS: 103.0

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	43 0f 01 3c 2e       	invlpg BYTE PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 384.87
- Reference cycles: 324.41
- UOPS_RETIRED.ALL: 103.0
- UOPS_MS: 103.0

With loop_count=10 and unroll_count=1

Code:

   0:	43 0f 01 3c 2e       	invlpg BYTE PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 389.47
- Reference cycles: 328.25
- UOPS_RETIRED.ALL: 105.0
- UOPS_MS: 103.0