ADC_13 (R16, R16) - Throughput and Uops (IACA 2.3)

With different registers for different operands

With 1 independent instruction

Throughput Analysis Report
--------------------------
Block Throughput: 0.95 Cycles       Throughput Bottleneck: FrontEnd

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 0.5    0.0  | 0.0  | 0.0    0.0  | 0.0    0.0  | 0.0  | 0.0  | 0.5  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 0.5       |     |           |           |     |     | 0.5 |     | CP | adc r8w, r9w
Total Num Of Uops: 1

With additional dependency-breaking instructions

Throughput Analysis Report
--------------------------
Block Throughput: 0.95 Cycles       Throughput Bottleneck: FrontEnd

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 0.5    0.0  | 0.5  | 0.0    0.0  | 0.0    0.0  | 0.0  | 0.5  | 0.5  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 0.5       |     |           |           |     |     | 0.5 |     | CP | adc r8w, r9w
|   1    |           | 0.5 |           |           |     | 0.5 |     |     |    | test r15, r15
Total Num Of Uops: 2

With 12 independent instructions

Throughput Analysis Report
--------------------------
Block Throughput: 11.43 Cycles       Throughput Bottleneck: Dependency chains (possibly between iterations)

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 6.0    0.0  | 0.0  | 0.0    0.0  | 0.0    0.0  | 0.0  | 0.0  | 6.0  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 1.0       |     |           |           |     |     |     |     | CP | adc r8w, r9w
|   1    |           |     |           |           |     |     | 1.0 |     | CP | adc r10w, r9w
|   1    | 1.0       |     |           |           |     |     |     |     | CP | adc r11w, r9w
|   1    |           |     |           |           |     |     | 1.0 |     | CP | adc r12w, r9w
|   1    | 1.0       |     |           |           |     |     |     |     | CP | adc r13w, r9w
|   1    |           |     |           |           |     |     | 1.0 |     | CP | adc r14w, r9w
|   1    | 1.0       |     |           |           |     |     |     |     | CP | adc bx, r9w
|   1    |           |     |           |           |     |     | 1.0 |     | CP | adc cx, r9w
|   1    | 1.0       |     |           |           |     |     |     |     | CP | adc dx, r9w
|   1    |           |     |           |           |     |     | 1.0 |     | CP | adc di, r9w
|   1    | 1.0       |     |           |           |     |     |     |     | CP | adc si, r9w
|   1    |           |     |           |           |     |     | 1.0 |     | CP | adc bp, r9w
Total Num Of Uops: 12

With additional dependency-breaking instructions

Throughput Analysis Report
--------------------------
Block Throughput: 6.00 Cycles       Throughput Bottleneck: FrontEnd

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 6.0    0.0  | 6.0  | 0.0    0.0  | 0.0    0.0  | 0.0  | 6.0  | 6.0  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 1.0       |     |           |           |     |     |     |     | CP | adc r8w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | test r15, r15
|   1    |           |     |           |           |     |     | 1.0 |     | CP | adc r10w, r9w
|   1    |           |     |           |           |     | 1.0 |     |     | CP | test r15, r15
|   1    | 1.0       |     |           |           |     |     |     |     | CP | adc r11w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | test r15, r15
|   1    |           |     |           |           |     |     | 1.0 |     | CP | adc r12w, r9w
|   1    |           |     |           |           |     | 1.0 |     |     | CP | test r15, r15
|   1    | 1.0       |     |           |           |     |     |     |     | CP | adc r13w, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | test r15, r15
|   1    |           |     |           |           |     |     | 1.0 |     | CP | adc r14w, r9w
|   1    |           |     |           |           |     | 1.0 |     |     | CP | test r15, r15
|   1    | 1.0       |     |           |           |     |     |     |     | CP | adc bx, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | test r15, r15
|   1    |           |     |           |           |     |     | 1.0 |     | CP | adc cx, r9w
|   1    |           |     |           |           |     | 1.0 |     |     | CP | test r15, r15
|   1    | 1.0       |     |           |           |     |     |     |     | CP | adc dx, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | test r15, r15
|   1    |           |     |           |           |     |     | 1.0 |     | CP | adc di, r9w
|   1    |           |     |           |           |     | 1.0 |     |     | CP | test r15, r15
|   1    | 1.0       |     |           |           |     |     |     |     | CP | adc si, r9w
|   1    |           | 1.0 |           |           |     |     |     |     | CP | test r15, r15
|   1    |           |     |           |           |     |     | 1.0 |     | CP | adc bp, r9w
|   1    |           |     |           |           |     | 1.0 |     |     | CP | test r15, r15
Total Num Of Uops: 24

With the same register for for different operands

Throughput Analysis Report
--------------------------
Block Throughput: 0.95 Cycles       Throughput Bottleneck: FrontEnd

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 0.5    0.0  | 0.0  | 0.0    0.0  | 0.0    0.0  | 0.0  | 0.0  | 0.5  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 0.5       |     |           |           |     |     | 0.5 |     | CP | adc r8w, r8w
Total Num Of Uops: 1

With additional dependency-breaking instructions

Throughput Analysis Report
--------------------------
Block Throughput: 0.95 Cycles       Throughput Bottleneck: FrontEnd

Port Binding In Cycles Per Iteration:
---------------------------------------------------------------------------------------
|  Port  |  0   -  DV  |  1   |  2   -  D   |  3   -  D   |  4   |  5   |  6   |  7   |
---------------------------------------------------------------------------------------
| Cycles | 0.5    0.0  | 0.5  | 0.0    0.0  | 0.0    0.0  | 0.0  | 0.5  | 0.5  | 0.0  |
---------------------------------------------------------------------------------------


| Num Of |                    Ports pressure in cycles                     |    |
|  Uops  |  0  - DV  |  1  |  2  -  D  |  3  -  D  |  4  |  5  |  6  |  7  |    |
---------------------------------------------------------------------------------
|   1    | 0.5       |     |           |           |     |     | 0.5 |     | CP | adc r8w, r8w
|   1    |           | 0.5 |           |           |     | 0.5 |     |     |    | test r15, r15
Total Num Of Uops: 2