ADC_13 (R16, R16) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	66 45 11 c8          	adc    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 1.0
- Reference cycles: 1.06
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	66 45 11 c8          	adc    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 1.0
- Reference cycles: 1.05
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.51
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.59
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	66 45 11 c8          	adc    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 1.0
- Reference cycles: 1.05
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.51
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With additional dependency-breaking instructions

With unroll_count=500 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c8          	adc    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.0
- Reference cycles: 1.05
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.53
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.47
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With loop_count=1000 and unroll_count=10

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c8          	adc    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 2.2
- Core cycles: 1.0
- Reference cycles: 1.05
- UOPS_EXECUTED.THREAD: 2.1
- RETIRE_SLOTS: 2.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.51
- UOPS_PORT_1: 0.48
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.52
- UOPS_PORT_6: 0.59
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c8          	adc    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 2.02
- Core cycles: 1.0
- Reference cycles: 1.05
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.51
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.49
- UOPS_PORT_6: 0.51
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	66 45 11 ca          	adc    r10w,r9w
   8:	66 45 11 cb          	adc    r11w,r9w
   c:	66 45 11 cc          	adc    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 4.25
- UOPS_EXECUTED.THREAD: 4.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 2.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=2

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	66 45 11 ca          	adc    r10w,r9w
   8:	66 45 11 cb          	adc    r11w,r9w
   c:	66 45 11 cc          	adc    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.0
- Reference cycles: 4.21
- UOPS_EXECUTED.THREAD: 4.5
- RETIRE_SLOTS: 4.5
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.04
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 2.46
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	66 45 11 ca          	adc    r10w,r9w
   8:	66 45 11 cb          	adc    r11w,r9w
   c:	66 45 11 cc          	adc    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.0
- Reference cycles: 4.21
- UOPS_EXECUTED.THREAD: 4.05
- RETIRE_SLOTS: 4.05
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 2.05
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With additional dependency-breaking instructions

With unroll_count=200 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c8          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 11 ca          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 11 cb          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 11 cc          	adc    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 2.0
- Reference cycles: 2.08
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.0
- UOPS_PORT_1: 2.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.0
- UOPS_PORT_6: 2.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=2

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c8          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 11 ca          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 11 cb          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 11 cc          	adc    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 9.0
- Core cycles: 2.63
- Reference cycles: 2.77
- UOPS_EXECUTED.THREAD: 8.51
- RETIRE_SLOTS: 8.5
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.13
- UOPS_PORT_1: 1.99
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.77
- UOPS_PORT_6: 2.62
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c8          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 11 ca          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 11 cb          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 11 cc          	adc    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 8.1
- Core cycles: 2.24
- Reference cycles: 2.36
- UOPS_EXECUTED.THREAD: 8.06
- RETIRE_SLOTS: 8.05
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.06
- UOPS_PORT_1: 1.93
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.98
- UOPS_PORT_6: 2.09
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	66 45 11 ca          	adc    r10w,r9w
   8:	66 45 11 cb          	adc    r11w,r9w
   c:	66 45 11 cc          	adc    r12w,r9w
  10:	66 45 11 cd          	adc    r13w,r9w
  14:	66 45 11 ce          	adc    r14w,r9w
  18:	66 44 11 cb          	adc    bx,r9w
  1c:	66 44 11 c9          	adc    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 8.5
- UOPS_EXECUTED.THREAD: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 4.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=1

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	66 45 11 ca          	adc    r10w,r9w
   8:	66 45 11 cb          	adc    r11w,r9w
   c:	66 45 11 cc          	adc    r12w,r9w
  10:	66 45 11 cd          	adc    r13w,r9w
  14:	66 45 11 ce          	adc    r14w,r9w
  18:	66 44 11 cb          	adc    bx,r9w
  1c:	66 44 11 c9          	adc    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.01
- Reference cycles: 8.43
- UOPS_EXECUTED.THREAD: 9.0
- RETIRE_SLOTS: 9.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.08
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 4.92
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	66 45 11 ca          	adc    r10w,r9w
   8:	66 45 11 cb          	adc    r11w,r9w
   c:	66 45 11 cc          	adc    r12w,r9w
  10:	66 45 11 cd          	adc    r13w,r9w
  14:	66 45 11 ce          	adc    r14w,r9w
  18:	66 44 11 cb          	adc    bx,r9w
  1c:	66 44 11 c9          	adc    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.01
- Reference cycles: 8.42
- UOPS_EXECUTED.THREAD: 8.1
- RETIRE_SLOTS: 8.1
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 4.11
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.02

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c8          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 11 ca          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 11 cb          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 11 cc          	adc    r12w,r9w
  1c:	4d 85 ff             	test   r15,r15
  1f:	66 45 11 cd          	adc    r13w,r9w
  23:	4d 85 ff             	test   r15,r15
  26:	66 45 11 ce          	adc    r14w,r9w
  2a:	4d 85 ff             	test   r15,r15
  2d:	66 44 11 cb          	adc    bx,r9w
  31:	4d 85 ff             	test   r15,r15
  34:	66 44 11 c9          	adc    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 4.0
- Reference cycles: 4.2
- UOPS_EXECUTED.THREAD: 16.0
- RETIRE_SLOTS: 16.0
- UOPS_MITE: 16.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.0
- UOPS_PORT_1: 4.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 4.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=1

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c8          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 11 ca          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 11 cb          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 11 cc          	adc    r12w,r9w
  1c:	4d 85 ff             	test   r15,r15
  1f:	66 45 11 cd          	adc    r13w,r9w
  23:	4d 85 ff             	test   r15,r15
  26:	66 45 11 ce          	adc    r14w,r9w
  2a:	4d 85 ff             	test   r15,r15
  2d:	66 44 11 cb          	adc    bx,r9w
  31:	4d 85 ff             	test   r15,r15
  34:	66 44 11 c9          	adc    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 18.0
- Core cycles: 5.2
- Reference cycles: 5.47
- UOPS_EXECUTED.THREAD: 17.01
- RETIRE_SLOTS: 17.0
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.26
- UOPS_PORT_1: 3.95
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 3.64
- UOPS_PORT_6: 5.16
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c8          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 11 ca          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 11 cb          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 11 cc          	adc    r12w,r9w
  1c:	4d 85 ff             	test   r15,r15
  1f:	66 45 11 cd          	adc    r13w,r9w
  23:	4d 85 ff             	test   r15,r15
  26:	66 45 11 ce          	adc    r14w,r9w
  2a:	4d 85 ff             	test   r15,r15
  2d:	66 44 11 cb          	adc    bx,r9w
  31:	4d 85 ff             	test   r15,r15
  34:	66 44 11 c9          	adc    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 16.2
- Core cycles: 4.39
- Reference cycles: 4.62
- UOPS_EXECUTED.THREAD: 16.12
- RETIRE_SLOTS: 16.1
- UOPS_MITE: 0.16
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.09
- UOPS_PORT_1: 3.9
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 3.91
- UOPS_PORT_6: 4.22
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

With 12 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	66 45 11 ca          	adc    r10w,r9w
   8:	66 45 11 cb          	adc    r11w,r9w
   c:	66 45 11 cc          	adc    r12w,r9w
  10:	66 45 11 cd          	adc    r13w,r9w
  14:	66 45 11 ce          	adc    r14w,r9w
  18:	66 44 11 cb          	adc    bx,r9w
  1c:	66 44 11 c9          	adc    cx,r9w
  20:	66 44 11 ca          	adc    dx,r9w
  24:	66 44 11 cf          	adc    di,r9w
  28:	66 44 11 ce          	adc    si,r9w
  2c:	66 44 11 cd          	adc    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 12.0
- Reference cycles: 12.6
- UOPS_EXECUTED.THREAD: 12.0
- RETIRE_SLOTS: 12.0
- UOPS_MITE: 12.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 6.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 3.0

With loop_count=1000 and unroll_count=1

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	66 45 11 ca          	adc    r10w,r9w
   8:	66 45 11 cb          	adc    r11w,r9w
   c:	66 45 11 cc          	adc    r12w,r9w
  10:	66 45 11 cd          	adc    r13w,r9w
  14:	66 45 11 ce          	adc    r14w,r9w
  18:	66 44 11 cb          	adc    bx,r9w
  1c:	66 44 11 c9          	adc    cx,r9w
  20:	66 44 11 ca          	adc    dx,r9w
  24:	66 44 11 cf          	adc    di,r9w
  28:	66 44 11 ce          	adc    si,r9w
  2c:	66 44 11 cd          	adc    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 12.01
- Reference cycles: 12.64
- UOPS_EXECUTED.THREAD: 13.0
- RETIRE_SLOTS: 13.0
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.06
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 6.94
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=10

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	66 45 11 ca          	adc    r10w,r9w
   8:	66 45 11 cb          	adc    r11w,r9w
   c:	66 45 11 cc          	adc    r12w,r9w
  10:	66 45 11 cd          	adc    r13w,r9w
  14:	66 45 11 ce          	adc    r14w,r9w
  18:	66 44 11 cb          	adc    bx,r9w
  1c:	66 44 11 c9          	adc    cx,r9w
  20:	66 44 11 ca          	adc    dx,r9w
  24:	66 44 11 cf          	adc    di,r9w
  28:	66 44 11 ce          	adc    si,r9w
  2c:	66 44 11 cd          	adc    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 12.2
- Core cycles: 12.01
- Reference cycles: 12.64
- UOPS_EXECUTED.THREAD: 12.1
- RETIRE_SLOTS: 12.1
- UOPS_MITE: 0.12
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 6.11
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.03

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c8          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 11 ca          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 11 cb          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 11 cc          	adc    r12w,r9w
  1c:	4d 85 ff             	test   r15,r15
  1f:	66 45 11 cd          	adc    r13w,r9w
  23:	4d 85 ff             	test   r15,r15
  26:	66 45 11 ce          	adc    r14w,r9w
  2a:	4d 85 ff             	test   r15,r15
  2d:	66 44 11 cb          	adc    bx,r9w
  31:	4d 85 ff             	test   r15,r15
  34:	66 44 11 c9          	adc    cx,r9w
  38:	4d 85 ff             	test   r15,r15
  3b:	66 44 11 ca          	adc    dx,r9w
  3f:	4d 85 ff             	test   r15,r15
  42:	66 44 11 cf          	adc    di,r9w
  46:	4d 85 ff             	test   r15,r15
  49:	66 44 11 ce          	adc    si,r9w
  4d:	4d 85 ff             	test   r15,r15
  50:	66 44 11 cd          	adc    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 24.0
- Core cycles: 6.0
- Reference cycles: 6.33
- UOPS_EXECUTED.THREAD: 24.0
- RETIRE_SLOTS: 24.0
- UOPS_MITE: 24.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.0
- UOPS_PORT_1: 6.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 6.0
- UOPS_PORT_6: 6.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 6.0

With loop_count=1000 and unroll_count=1

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c8          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 11 ca          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 11 cb          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 11 cc          	adc    r12w,r9w
  1c:	4d 85 ff             	test   r15,r15
  1f:	66 45 11 cd          	adc    r13w,r9w
  23:	4d 85 ff             	test   r15,r15
  26:	66 45 11 ce          	adc    r14w,r9w
  2a:	4d 85 ff             	test   r15,r15
  2d:	66 44 11 cb          	adc    bx,r9w
  31:	4d 85 ff             	test   r15,r15
  34:	66 44 11 c9          	adc    cx,r9w
  38:	4d 85 ff             	test   r15,r15
  3b:	66 44 11 ca          	adc    dx,r9w
  3f:	4d 85 ff             	test   r15,r15
  42:	66 44 11 cf          	adc    di,r9w
  46:	4d 85 ff             	test   r15,r15
  49:	66 44 11 ce          	adc    si,r9w
  4d:	4d 85 ff             	test   r15,r15
  50:	66 44 11 cd          	adc    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 26.0
- Core cycles: 7.38
- Reference cycles: 7.76
- UOPS_EXECUTED.THREAD: 25.0
- RETIRE_SLOTS: 25.0
- UOPS_MITE: 0.03
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.34
- UOPS_PORT_1: 5.81
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 5.72
- UOPS_PORT_6: 7.14
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c8          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 11 ca          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 11 cb          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 11 cc          	adc    r12w,r9w
  1c:	4d 85 ff             	test   r15,r15
  1f:	66 45 11 cd          	adc    r13w,r9w
  23:	4d 85 ff             	test   r15,r15
  26:	66 45 11 ce          	adc    r14w,r9w
  2a:	4d 85 ff             	test   r15,r15
  2d:	66 44 11 cb          	adc    bx,r9w
  31:	4d 85 ff             	test   r15,r15
  34:	66 44 11 c9          	adc    cx,r9w
  38:	4d 85 ff             	test   r15,r15
  3b:	66 44 11 ca          	adc    dx,r9w
  3f:	4d 85 ff             	test   r15,r15
  42:	66 44 11 cf          	adc    di,r9w
  46:	4d 85 ff             	test   r15,r15
  49:	66 44 11 ce          	adc    si,r9w
  4d:	4d 85 ff             	test   r15,r15
  50:	66 44 11 cd          	adc    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 24.2
- Core cycles: 6.36
- Reference cycles: 6.69
- UOPS_EXECUTED.THREAD: 24.12
- RETIRE_SLOTS: 24.1
- UOPS_MITE: 0.24
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.11
- UOPS_PORT_1: 5.93
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 5.91
- UOPS_PORT_6: 6.17
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.06

With the same register for for different operands

With unroll_count=500 and no inner loop

Code:

   0:	66 45 11 c0          	adc    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 1.0
- Reference cycles: 1.06
- UOPS_EXECUTED.THREAD: 1.0
- RETIRE_SLOTS: 1.0
- UOPS_MITE: 1.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.25

With loop_count=1000 and unroll_count=10

Code:

   0:	66 45 11 c0          	adc    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 1.0
- Reference cycles: 1.05
- UOPS_EXECUTED.THREAD: 1.1
- RETIRE_SLOTS: 1.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.51
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.59
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	66 45 11 c0          	adc    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 1.0
- Reference cycles: 1.05
- UOPS_EXECUTED.THREAD: 1.01
- RETIRE_SLOTS: 1.01
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.51
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With additional dependency-breaking instructions

With unroll_count=500 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c0          	adc    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.0
- Reference cycles: 1.05
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.53
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.47
- UOPS_PORT_6: 0.5
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With loop_count=1000 and unroll_count=10

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c0          	adc    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 2.2
- Core cycles: 1.0
- Reference cycles: 1.05
- UOPS_EXECUTED.THREAD: 2.1
- RETIRE_SLOTS: 2.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.51
- UOPS_PORT_1: 0.48
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.52
- UOPS_PORT_6: 0.59
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 11 c0          	adc    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 2.02
- Core cycles: 1.0
- Reference cycles: 1.05
- UOPS_EXECUTED.THREAD: 2.01
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.5
- UOPS_PORT_1: 0.51
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.49
- UOPS_PORT_6: 0.51
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

Tests for macro-fusion

With JB (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 82 00 00 00 00    	jb     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.13
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JB (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	72 00                	jb     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.13
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JBE (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 86 00 00 00 00    	jbe    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.2
- Reference cycles: 1.27
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.49
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.42

With JBE (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	76 00                	jbe    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.4
- Reference cycles: 1.47
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.6
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.54

With JL (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 8c 00 00 00 00    	jl     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.13
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JL (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	7c 00                	jl     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.17
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JLE (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 8e 00 00 00 00    	jle    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.21
- Reference cycles: 1.3
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.38
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.33

With JLE (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	7e 00                	jle    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.3
- Reference cycles: 1.4
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 0.7
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.56

With JNB (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 83 00 00 00 00    	jae    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.18
- Reference cycles: 1.2
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.42
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.23

With JNB (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	73 00                	jae    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.14
- Reference cycles: 1.2
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.99
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.49

With JNBE (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 87 00 00 00 00    	ja     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.11
- Reference cycles: 1.23
- UOPS_EXECUTED.THREAD: 2.02
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JNBE (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	77 00                	ja     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.19
- Reference cycles: 1.3
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JNL (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 8d 00 00 00 00    	jge    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.21
- Reference cycles: 1.3
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.42
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.27

With JNL (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	7d 00                	jge    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.14
- Reference cycles: 1.2
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.96
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.64

With JNLE (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 8f 00 00 00 00    	jg     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.16
- Reference cycles: 1.27
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JNLE (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	7f 00                	jg     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.2
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JNO (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 81 00 00 00 00    	jno    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.21
- Reference cycles: 1.27
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.42
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.24

With JNO (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	71 00                	jno    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.2
- Reference cycles: 1.27
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 1.12
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.48

With JNP (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 8b 00 00 00 00    	jnp    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.17
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JNP (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	7b 00                	jnp    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.13
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.8
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JNS (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 89 00 00 00 00    	jns    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.17
- Reference cycles: 1.2
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.37
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.29

With JNS (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	79 00                	jns    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.23
- Reference cycles: 1.23
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.99
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 0.99
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.5

With JNZ (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 85 00 00 00 00    	jne    0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.1
- Reference cycles: 1.17
- UOPS_EXECUTED.THREAD: 2.04
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 1.73
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JNZ (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	75 00                	jne    0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.1
- Reference cycles: 1.17
- UOPS_EXECUTED.THREAD: 2.02
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JO (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 80 00 00 00 00    	jo     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.13
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JO (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	70 00                	jo     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.13
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JP (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 8a 00 00 00 00    	jp     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.23
- Reference cycles: 1.3
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.2
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.42

With JP (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	7a 00                	jp     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.3
- Reference cycles: 1.4
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.7
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.0
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.57

With JS (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 88 00 00 00 00    	js     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.13
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JS (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	78 00                	js     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.07
- Reference cycles: 1.13
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.01
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With JZ (Rel32)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	0f 84 00 00 00 00    	je     0xa

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.22
- Reference cycles: 1.27
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 0.38
- UOPS_MS: 0.0
- UOPS_PORT_0: 1.01
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.4

With JZ (Rel8)

Code:

   0:	66 45 11 c8          	adc    r8w,r9w
   4:	74 00                	je     0x6

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 1.27
- Reference cycles: 1.3
- UOPS_EXECUTED.THREAD: 2.0
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 0.63
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.99
- UOPS_PORT_1: 0.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.0
- UOPS_PORT_6: 1.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.57