RDRAND (R32) - Throughput and Uops
With 1 independent instruction
With unroll_count=10 and no inner loop
Code:
0: 41 0f c7 f0 rdrand r8d
Show nanoBench command
Results:
Instructions retired: 1.0
Core cycles: 905.77
Reference cycles: 627.13
UOPS_EXECUTED.THREAD: 12.0
RETIRE_SLOTS: 14.0
UOPS_MITE: 0.0
UOPS_MS: 14.0
UOPS_PORT_0: 2.4
UOPS_PORT_1: 3.1
UOPS_PORT_2: 0.5
UOPS_PORT_3: 0.5
UOPS_PORT_4: 0.0
UOPS_PORT_5: 1.8
UOPS_PORT_6: 3.2
UOPS_PORT_7: 0.0
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
UOPS_MITE>=1: 0.0
With unroll_count=10, no inner loop, and 1 NOP
Code:
0: 41 0f c7 f0 rdrand r8d 4: 90 nop
Show nanoBench command
Results:
Instructions retired: 2.0
Core cycles: 905.73
Reference cycles: 631.73
UOPS_EXECUTED.THREAD: 12.0
RETIRE_SLOTS: 15.0
UOPS_MITE: 1.0
UOPS_MS: 14.0
UOPS_PORT_0: 2.6
UOPS_PORT_1: 3.1
UOPS_PORT_2: 0.5
UOPS_PORT_3: 0.5
UOPS_PORT_4: 0.0
UOPS_PORT_5: 1.4
UOPS_PORT_6: 3.4
UOPS_PORT_7: 0.0
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
UOPS_MITE>=1: 1.0
With loop_count=10 and unroll_count=1
Code:
0: 41 0f c7 f0 rdrand r8d
Show nanoBench command
Results:
Instructions retired: 3.0
Core cycles: 908.63
Reference cycles: 633.27
UOPS_EXECUTED.THREAD: 13.0
RETIRE_SLOTS: 16.07
UOPS_MITE: 0.73
UOPS_MS: 14.0
UOPS_PORT_0: 2.2
UOPS_PORT_1: 3.17
UOPS_PORT_2: 0.5
UOPS_PORT_3: 0.5
UOPS_PORT_4: 0.0
UOPS_PORT_5: 1.5
UOPS_PORT_6: 4.65
UOPS_PORT_7: 0.0
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
UOPS_MITE>=1: 0.6