ADC_13 (R16, R16)

With unroll_count=500 and no inner loop

Code:

   0:	66 45 13 c1          	adc    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 2.0
- Reference cycles: 1.77
- UOPS_EXECUTED.CORE: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.55
- UOPS_PORT_1: 0.46
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.41
- UOPS_PORT_6: 0.58
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

Code:

   0:	66 45 13 c1          	adc    r8w,r9w
   4:	90                   	nop

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 2.0
- Reference cycles: 1.79
- UOPS_EXECUTED.CORE: 2.0
- RETIRE_SLOTS: 3.0
- UOPS_MITE: 3.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.53
- UOPS_PORT_1: 0.46
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.47
- UOPS_PORT_6: 0.54
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

Code:

   0:	66 45 13 c1          	adc    r8w,r9w
   4:	90                   	nop
   5:	90                   	nop

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 2.0
- Reference cycles: 1.79
- UOPS_EXECUTED.CORE: 2.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.54
- UOPS_PORT_1: 0.49
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.4
- UOPS_PORT_6: 0.57
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

Code:

   0:	66 45 13 c1          	adc    r8w,r9w
   4:	90                   	nop
   5:	90                   	nop
   6:	90                   	nop

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 2.01
- Reference cycles: 1.79
- UOPS_EXECUTED.CORE: 2.0
- RETIRE_SLOTS: 5.0
- UOPS_MITE: 5.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.72
- UOPS_PORT_1: 0.36
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.45
- UOPS_PORT_6: 0.46
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

Code:

   0:	66 45 13 c1          	adc    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 2.0
- Reference cycles: 1.78
- UOPS_EXECUTED.CORE: 2.1
- RETIRE_SLOTS: 2.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.56
- UOPS_PORT_1: 0.45
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.44
- UOPS_PORT_6: 0.65
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	66 45 13 c1          	adc    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 2.0
- Reference cycles: 1.78
- UOPS_EXECUTED.CORE: 2.01
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.56
- UOPS_PORT_1: 0.45
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.43
- UOPS_PORT_6: 0.57
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With additional dependency-breaking instructions

With unroll_count=500 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c1          	adc    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 2.0
- Reference cycles: 1.79
- UOPS_EXECUTED.CORE: 3.0
- RETIRE_SLOTS: 3.0
- UOPS_MITE: 3.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.59
- UOPS_PORT_1: 0.86
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.9
- UOPS_PORT_6: 0.65
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c1          	adc    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 2.2
- Core cycles: 2.0
- Reference cycles: 1.78
- UOPS_EXECUTED.CORE: 3.1
- RETIRE_SLOTS: 3.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.6
- UOPS_PORT_1: 0.87
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.89
- UOPS_PORT_6: 0.74
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c1          	adc    r8w,r9w

Show nanoBench command
Results:
- Instructions retired: 2.02
- Core cycles: 2.0
- Reference cycles: 1.78
- UOPS_EXECUTED.CORE: 3.01
- RETIRE_SLOTS: 3.01
- UOPS_MITE: 0.03
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.59
- UOPS_PORT_1: 0.87
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.89
- UOPS_PORT_6: 0.65
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With 4 independent instructions

With unroll_count=200 and no inner loop

Code:

   0:	66 45 13 c1          	adc    r8w,r9w
   4:	66 45 13 d1          	adc    r10w,r9w
   8:	66 45 13 d9          	adc    r11w,r9w
   c:	66 45 13 e1          	adc    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 4.0
- Reference cycles: 3.57
- UOPS_EXECUTED.CORE: 8.0
- RETIRE_SLOTS: 8.0
- UOPS_MITE: 8.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.25
- UOPS_PORT_1: 1.89
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.87
- UOPS_PORT_6: 2.0
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

Code:

   0:	66 45 13 c1          	adc    r8w,r9w
   4:	66 45 13 d1          	adc    r10w,r9w
   8:	66 45 13 d9          	adc    r11w,r9w
   c:	66 45 13 e1          	adc    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 5.0
- Core cycles: 4.08
- Reference cycles: 3.63
- UOPS_EXECUTED.CORE: 8.5
- RETIRE_SLOTS: 8.5
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.15
- UOPS_PORT_1: 1.88
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.89
- UOPS_PORT_6: 2.57
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=20

Code:

   0:	66 45 13 c1          	adc    r8w,r9w
   4:	66 45 13 d1          	adc    r10w,r9w
   8:	66 45 13 d9          	adc    r11w,r9w
   c:	66 45 13 e1          	adc    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 4.1
- Core cycles: 4.07
- Reference cycles: 3.62
- UOPS_EXECUTED.CORE: 8.05
- RETIRE_SLOTS: 8.05
- UOPS_MITE: 0.08
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.14
- UOPS_PORT_1: 1.9
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 1.84
- UOPS_PORT_6: 2.18
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

With additional dependency-breaking instructions

With unroll_count=200 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c1          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 13 d1          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 13 d9          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 13 e1          	adc    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 4.0
- Reference cycles: 3.55
- UOPS_EXECUTED.CORE: 12.0
- RETIRE_SLOTS: 12.0
- UOPS_MITE: 12.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 3.3
- UOPS_PORT_1: 2.83
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 2.82
- UOPS_PORT_6: 3.06
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c1          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 13 d1          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 13 d9          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 13 e1          	adc    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 9.0
- Core cycles: 3.31
- Reference cycles: 2.94
- UOPS_EXECUTED.CORE: 12.51
- RETIRE_SLOTS: 12.5
- UOPS_MITE: 0.01
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.98
- UOPS_PORT_1: 3.08
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 3.16
- UOPS_PORT_6: 3.29
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=20

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c1          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 13 d1          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 13 d9          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 13 e1          	adc    r12w,r9w

Show nanoBench command
Results:
- Instructions retired: 8.1
- Core cycles: 3.12
- Reference cycles: 2.78
- UOPS_EXECUTED.CORE: 12.06
- RETIRE_SLOTS: 12.05
- UOPS_MITE: 0.12
- UOPS_MS: 0.0
- UOPS_PORT_0: 2.88
- UOPS_PORT_1: 3.04
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 3.08
- UOPS_PORT_6: 3.06
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

With 8 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	66 45 13 c1          	adc    r8w,r9w
   4:	66 45 13 d1          	adc    r10w,r9w
   8:	66 45 13 d9          	adc    r11w,r9w
   c:	66 45 13 e1          	adc    r12w,r9w
  10:	66 45 13 e9          	adc    r13w,r9w
  14:	66 45 13 f1          	adc    r14w,r9w
  18:	66 41 13 d9          	adc    bx,r9w
  1c:	66 41 13 c9          	adc    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 8.0
- Core cycles: 8.0
- Reference cycles: 7.2
- UOPS_EXECUTED.CORE: 16.0
- RETIRE_SLOTS: 16.0
- UOPS_MITE: 16.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.35
- UOPS_PORT_1: 3.91
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.1
- UOPS_PORT_6: 3.66
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

Code:

   0:	66 45 13 c1          	adc    r8w,r9w
   4:	66 45 13 d1          	adc    r10w,r9w
   8:	66 45 13 d9          	adc    r11w,r9w
   c:	66 45 13 e1          	adc    r12w,r9w
  10:	66 45 13 e9          	adc    r13w,r9w
  14:	66 45 13 f1          	adc    r14w,r9w
  18:	66 41 13 d9          	adc    bx,r9w
  1c:	66 41 13 c9          	adc    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 10.0
- Core cycles: 8.01
- Reference cycles: 7.12
- UOPS_EXECUTED.CORE: 17.0
- RETIRE_SLOTS: 17.0
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.09
- UOPS_PORT_1: 3.97
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 4.0
- UOPS_PORT_6: 4.94
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	66 45 13 c1          	adc    r8w,r9w
   4:	66 45 13 d1          	adc    r10w,r9w
   8:	66 45 13 d9          	adc    r11w,r9w
   c:	66 45 13 e1          	adc    r12w,r9w
  10:	66 45 13 e9          	adc    r13w,r9w
  14:	66 45 13 f1          	adc    r14w,r9w
  18:	66 41 13 d9          	adc    bx,r9w
  1c:	66 41 13 c9          	adc    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 8.2
- Core cycles: 8.01
- Reference cycles: 7.11
- UOPS_EXECUTED.CORE: 16.1
- RETIRE_SLOTS: 16.1
- UOPS_MITE: 0.16
- UOPS_MS: 0.0
- UOPS_PORT_0: 4.06
- UOPS_PORT_1: 4.02
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 3.94
- UOPS_PORT_6: 4.08
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.08

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c1          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 13 d1          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 13 d9          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 13 e1          	adc    r12w,r9w
  1c:	4d 85 ff             	test   r15,r15
  1f:	66 45 13 e9          	adc    r13w,r9w
  23:	4d 85 ff             	test   r15,r15
  26:	66 45 13 f1          	adc    r14w,r9w
  2a:	4d 85 ff             	test   r15,r15
  2d:	66 41 13 d9          	adc    bx,r9w
  31:	4d 85 ff             	test   r15,r15
  34:	66 41 13 c9          	adc    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 16.0
- Core cycles: 8.0
- Reference cycles: 7.15
- UOPS_EXECUTED.CORE: 24.0
- RETIRE_SLOTS: 24.0
- UOPS_MITE: 24.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.59
- UOPS_PORT_1: 5.65
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 5.64
- UOPS_PORT_6: 6.12
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c1          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 13 d1          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 13 d9          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 13 e1          	adc    r12w,r9w
  1c:	4d 85 ff             	test   r15,r15
  1f:	66 45 13 e9          	adc    r13w,r9w
  23:	4d 85 ff             	test   r15,r15
  26:	66 45 13 f1          	adc    r14w,r9w
  2a:	4d 85 ff             	test   r15,r15
  2d:	66 41 13 d9          	adc    bx,r9w
  31:	4d 85 ff             	test   r15,r15
  34:	66 41 13 c9          	adc    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 18.0
- Core cycles: 6.52
- Reference cycles: 5.8
- UOPS_EXECUTED.CORE: 25.01
- RETIRE_SLOTS: 25.0
- UOPS_MITE: 0.03
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.0
- UOPS_PORT_1: 6.26
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 6.5
- UOPS_PORT_6: 6.26
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c1          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 13 d1          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 13 d9          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 13 e1          	adc    r12w,r9w
  1c:	4d 85 ff             	test   r15,r15
  1f:	66 45 13 e9          	adc    r13w,r9w
  23:	4d 85 ff             	test   r15,r15
  26:	66 45 13 f1          	adc    r14w,r9w
  2a:	4d 85 ff             	test   r15,r15
  2d:	66 41 13 d9          	adc    bx,r9w
  31:	4d 85 ff             	test   r15,r15
  34:	66 41 13 c9          	adc    cx,r9w

Show nanoBench command
Results:
- Instructions retired: 16.2
- Core cycles: 6.24
- Reference cycles: 5.55
- UOPS_EXECUTED.CORE: 24.13
- RETIRE_SLOTS: 24.1
- UOPS_MITE: 0.25
- UOPS_MS: 0.0
- UOPS_PORT_0: 5.61
- UOPS_PORT_1: 6.21
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 6.11
- UOPS_PORT_6: 6.2
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.08

With 12 independent instructions

With unroll_count=100 and no inner loop

Code:

   0:	66 45 13 c1          	adc    r8w,r9w
   4:	66 45 13 d1          	adc    r10w,r9w
   8:	66 45 13 d9          	adc    r11w,r9w
   c:	66 45 13 e1          	adc    r12w,r9w
  10:	66 45 13 e9          	adc    r13w,r9w
  14:	66 45 13 f1          	adc    r14w,r9w
  18:	66 41 13 d9          	adc    bx,r9w
  1c:	66 41 13 c9          	adc    cx,r9w
  20:	66 41 13 d1          	adc    dx,r9w
  24:	66 41 13 f9          	adc    di,r9w
  28:	66 41 13 f1          	adc    si,r9w
  2c:	66 41 13 e9          	adc    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 12.0
- Core cycles: 12.0
- Reference cycles: 10.67
- UOPS_EXECUTED.CORE: 24.0
- RETIRE_SLOTS: 24.0
- UOPS_MITE: 24.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.52
- UOPS_PORT_1: 5.77
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 6.24
- UOPS_PORT_6: 5.48
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 12.0

With loop_count=1000 and unroll_count=1

Code:

   0:	66 45 13 c1          	adc    r8w,r9w
   4:	66 45 13 d1          	adc    r10w,r9w
   8:	66 45 13 d9          	adc    r11w,r9w
   c:	66 45 13 e1          	adc    r12w,r9w
  10:	66 45 13 e9          	adc    r13w,r9w
  14:	66 45 13 f1          	adc    r14w,r9w
  18:	66 41 13 d9          	adc    bx,r9w
  1c:	66 41 13 c9          	adc    cx,r9w
  20:	66 41 13 d1          	adc    dx,r9w
  24:	66 41 13 f9          	adc    di,r9w
  28:	66 41 13 f1          	adc    si,r9w
  2c:	66 41 13 e9          	adc    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 14.0
- Core cycles: 12.01
- Reference cycles: 10.68
- UOPS_EXECUTED.CORE: 25.0
- RETIRE_SLOTS: 25.0
- UOPS_MITE: 0.09
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.07
- UOPS_PORT_1: 6.0
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 6.0
- UOPS_PORT_6: 6.93
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.04

With loop_count=100 and unroll_count=10

Code:

   0:	66 45 13 c1          	adc    r8w,r9w
   4:	66 45 13 d1          	adc    r10w,r9w
   8:	66 45 13 d9          	adc    r11w,r9w
   c:	66 45 13 e1          	adc    r12w,r9w
  10:	66 45 13 e9          	adc    r13w,r9w
  14:	66 45 13 f1          	adc    r14w,r9w
  18:	66 41 13 d9          	adc    bx,r9w
  1c:	66 41 13 c9          	adc    cx,r9w
  20:	66 41 13 d1          	adc    dx,r9w
  24:	66 41 13 f9          	adc    di,r9w
  28:	66 41 13 f1          	adc    si,r9w
  2c:	66 41 13 e9          	adc    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 12.2
- Core cycles: 12.01
- Reference cycles: 10.68
- UOPS_EXECUTED.CORE: 24.1
- RETIRE_SLOTS: 24.1
- UOPS_MITE: 0.24
- UOPS_MS: 0.0
- UOPS_PORT_0: 6.17
- UOPS_PORT_1: 6.07
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 5.92
- UOPS_PORT_6: 5.94
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.12

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c1          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 13 d1          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 13 d9          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 13 e1          	adc    r12w,r9w
  1c:	4d 85 ff             	test   r15,r15
  1f:	66 45 13 e9          	adc    r13w,r9w
  23:	4d 85 ff             	test   r15,r15
  26:	66 45 13 f1          	adc    r14w,r9w
  2a:	4d 85 ff             	test   r15,r15
  2d:	66 41 13 d9          	adc    bx,r9w
  31:	4d 85 ff             	test   r15,r15
  34:	66 41 13 c9          	adc    cx,r9w
  38:	4d 85 ff             	test   r15,r15
  3b:	66 41 13 d1          	adc    dx,r9w
  3f:	4d 85 ff             	test   r15,r15
  42:	66 41 13 f9          	adc    di,r9w
  46:	4d 85 ff             	test   r15,r15
  49:	66 41 13 f1          	adc    si,r9w
  4d:	4d 85 ff             	test   r15,r15
  50:	66 41 13 e9          	adc    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 24.0
- Core cycles: 12.0
- Reference cycles: 10.72
- UOPS_EXECUTED.CORE: 36.0
- RETIRE_SLOTS: 36.0
- UOPS_MITE: 36.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 9.88
- UOPS_PORT_1: 8.48
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 8.46
- UOPS_PORT_6: 9.18
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 12.0

With loop_count=1000 and unroll_count=1

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c1          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 13 d1          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 13 d9          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 13 e1          	adc    r12w,r9w
  1c:	4d 85 ff             	test   r15,r15
  1f:	66 45 13 e9          	adc    r13w,r9w
  23:	4d 85 ff             	test   r15,r15
  26:	66 45 13 f1          	adc    r14w,r9w
  2a:	4d 85 ff             	test   r15,r15
  2d:	66 41 13 d9          	adc    bx,r9w
  31:	4d 85 ff             	test   r15,r15
  34:	66 41 13 c9          	adc    cx,r9w
  38:	4d 85 ff             	test   r15,r15
  3b:	66 41 13 d1          	adc    dx,r9w
  3f:	4d 85 ff             	test   r15,r15
  42:	66 41 13 f9          	adc    di,r9w
  46:	4d 85 ff             	test   r15,r15
  49:	66 41 13 f1          	adc    si,r9w
  4d:	4d 85 ff             	test   r15,r15
  50:	66 41 13 e9          	adc    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 26.0
- Core cycles: 10.02
- Reference cycles: 8.9
- UOPS_EXECUTED.CORE: 37.01
- RETIRE_SLOTS: 37.0
- UOPS_MITE: 0.04
- UOPS_MS: 0.0
- UOPS_PORT_0: 8.58
- UOPS_PORT_1: 9.43
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 9.44
- UOPS_PORT_6: 9.57
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c1          	adc    r8w,r9w
   7:	4d 85 ff             	test   r15,r15
   a:	66 45 13 d1          	adc    r10w,r9w
   e:	4d 85 ff             	test   r15,r15
  11:	66 45 13 d9          	adc    r11w,r9w
  15:	4d 85 ff             	test   r15,r15
  18:	66 45 13 e1          	adc    r12w,r9w
  1c:	4d 85 ff             	test   r15,r15
  1f:	66 45 13 e9          	adc    r13w,r9w
  23:	4d 85 ff             	test   r15,r15
  26:	66 45 13 f1          	adc    r14w,r9w
  2a:	4d 85 ff             	test   r15,r15
  2d:	66 41 13 d9          	adc    bx,r9w
  31:	4d 85 ff             	test   r15,r15
  34:	66 41 13 c9          	adc    cx,r9w
  38:	4d 85 ff             	test   r15,r15
  3b:	66 41 13 d1          	adc    dx,r9w
  3f:	4d 85 ff             	test   r15,r15
  42:	66 41 13 f9          	adc    di,r9w
  46:	4d 85 ff             	test   r15,r15
  49:	66 41 13 f1          	adc    si,r9w
  4d:	4d 85 ff             	test   r15,r15
  50:	66 41 13 e9          	adc    bp,r9w

Show nanoBench command
Results:
- Instructions retired: 24.2
- Core cycles: 9.44
- Reference cycles: 8.4
- UOPS_EXECUTED.CORE: 36.12
- RETIRE_SLOTS: 36.1
- UOPS_MITE: 0.36
- UOPS_MS: 0.0
- UOPS_PORT_0: 8.32
- UOPS_PORT_1: 9.2
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 9.4
- UOPS_PORT_6: 9.2
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.12

With the same register for for different operands

With unroll_count=500 and no inner loop

Code:

   0:	66 45 13 c0          	adc    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 2.0
- Reference cycles: 1.79
- UOPS_EXECUTED.CORE: 2.0
- RETIRE_SLOTS: 2.0
- UOPS_MITE: 2.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.55
- UOPS_PORT_1: 0.46
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.41
- UOPS_PORT_6: 0.58
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

Code:

   0:	66 45 13 c0          	adc    r8w,r8w
   4:	90                   	nop

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 2.0
- Reference cycles: 1.79
- UOPS_EXECUTED.CORE: 2.0
- RETIRE_SLOTS: 3.0
- UOPS_MITE: 3.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.53
- UOPS_PORT_1: 0.46
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.47
- UOPS_PORT_6: 0.54
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

Code:

   0:	66 45 13 c0          	adc    r8w,r8w
   4:	90                   	nop
   5:	90                   	nop

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 2.0
- Reference cycles: 1.79
- UOPS_EXECUTED.CORE: 2.0
- RETIRE_SLOTS: 4.0
- UOPS_MITE: 4.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.54
- UOPS_PORT_1: 0.49
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.4
- UOPS_PORT_6: 0.57
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

Code:

   0:	66 45 13 c0          	adc    r8w,r8w
   4:	90                   	nop
   5:	90                   	nop
   6:	90                   	nop

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 2.01
- Reference cycles: 1.79
- UOPS_EXECUTED.CORE: 2.0
- RETIRE_SLOTS: 5.0
- UOPS_MITE: 5.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.72
- UOPS_PORT_1: 0.36
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.45
- UOPS_PORT_6: 0.46
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 2.0

With loop_count=1000 and unroll_count=10

Code:

   0:	66 45 13 c0          	adc    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 1.2
- Core cycles: 2.0
- Reference cycles: 1.78
- UOPS_EXECUTED.CORE: 2.1
- RETIRE_SLOTS: 2.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.56
- UOPS_PORT_1: 0.45
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.44
- UOPS_PORT_6: 0.65
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	66 45 13 c0          	adc    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 1.02
- Core cycles: 2.0
- Reference cycles: 1.78
- UOPS_EXECUTED.CORE: 2.01
- RETIRE_SLOTS: 2.01
- UOPS_MITE: 0.02
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.56
- UOPS_PORT_1: 0.45
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.43
- UOPS_PORT_6: 0.57
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

With additional dependency-breaking instructions

With unroll_count=500 and no inner loop

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c0          	adc    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 2.0
- Reference cycles: 1.79
- UOPS_EXECUTED.CORE: 3.0
- RETIRE_SLOTS: 3.0
- UOPS_MITE: 3.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.59
- UOPS_PORT_1: 0.86
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.9
- UOPS_PORT_6: 0.65
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c0          	adc    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 2.2
- Core cycles: 2.0
- Reference cycles: 1.78
- UOPS_EXECUTED.CORE: 3.1
- RETIRE_SLOTS: 3.1
- UOPS_MITE: 0.0
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.6
- UOPS_PORT_1: 0.87
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.89
- UOPS_PORT_6: 0.74
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

Code:

   0:	4d 85 ff             	test   r15,r15
   3:	66 45 13 c0          	adc    r8w,r8w

Show nanoBench command
Results:
- Instructions retired: 2.02
- Core cycles: 2.0
- Reference cycles: 1.78
- UOPS_EXECUTED.CORE: 3.01
- RETIRE_SLOTS: 3.01
- UOPS_MITE: 0.03
- UOPS_MS: 0.0
- UOPS_PORT_0: 0.59
- UOPS_PORT_1: 0.87
- UOPS_PORT_2: 0.0
- UOPS_PORT_3: 0.0
- UOPS_PORT_4: 0.0
- UOPS_PORT_5: 0.89
- UOPS_PORT_6: 0.65
- UOPS_PORT_7: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.01

ADC_13 (R16, R16) - Throughput and Uops

With different registers for different operands

With 1 independent instruction

With unroll_count=500 and no inner loop

With unroll_count=500, no inner loop, and 1 NOP

With unroll_count=500, no inner loop, and 2 NOPs

With unroll_count=500, no inner loop, and 3 NOPs

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With additional dependency-breaking instructions

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With 4 independent instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With additional dependency-breaking instructions

With unroll_count=200 and no inner loop

With loop_count=1000 and unroll_count=2

With loop_count=100 and unroll_count=20

With 8 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With 12 independent instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With additional dependency-breaking instructions

With unroll_count=100 and no inner loop

With loop_count=1000 and unroll_count=1

With loop_count=100 and unroll_count=10

With the same register for for different operands

With unroll_count=500 and no inner loop

With unroll_count=500, no inner loop, and 1 NOP

With unroll_count=500, no inner loop, and 2 NOPs

With unroll_count=500, no inner loop, and 3 NOPs

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100

With additional dependency-breaking instructions

With unroll_count=500 and no inner loop

With loop_count=1000 and unroll_count=10

With loop_count=100 and unroll_count=100