VDIVPS (YMM, YMM, YMM) - Throughput and Uops

With unroll_count=500 and no inner loop

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 14.53
  • Reference cycles: 14.08
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • DIV_CYCLES: 14.53
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 14.45
  • Reference cycles: 13.99
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • DIV_CYCLES: 14.45
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With unroll_count=500 and no inner loop

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	0f ae e8             	lfence 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 26.25
  • Reference cycles: 25.46
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 2.0
  • UOPS_PORT_0: 2.25
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.75
  • DIV_CYCLES: 18.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 14.53
  • Reference cycles: 14.09
  • UOPS_EXECUTED.THREAD: 3.1
  • RETIRE_SLOTS: 3.1
  • UOPS_MITE: 3.11
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.1
  • DIV_CYCLES: 14.53
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.1

With loop_count=1000, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
     b:	0f 1f 84 00 00 00 00 
    12:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.2
  • Core cycles: 14.36
  • Reference cycles: 13.92
  • UOPS_EXECUTED.THREAD: 3.1
  • RETIRE_SLOTS: 4.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.1
  • DIV_CYCLES: 14.33
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 14.56
  • Reference cycles: 14.12
  • UOPS_EXECUTED.THREAD: 3.01
  • RETIRE_SLOTS: 3.01
  • UOPS_MITE: 3.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.01
  • DIV_CYCLES: 14.55
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.01

With loop_count=100, unroll_count=100, and padding (long NOPs)

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
     b:	0f 1f 84 00 00 00 00 
    12:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.02
  • Core cycles: 14.61
  • Reference cycles: 14.17
  • UOPS_EXECUTED.THREAD: 3.01
  • RETIRE_SLOTS: 4.01
  • UOPS_MITE: 0.04
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.01
  • DIV_CYCLES: 14.61
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.02

With unroll_count=200 and no inner loop

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 58.2
  • Reference cycles: 56.48
  • UOPS_EXECUTED.THREAD: 12.0
  • RETIRE_SLOTS: 12.0
  • UOPS_MITE: 12.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.0
  • DIV_CYCLES: 58.21
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 57.95
  • Reference cycles: 56.2
  • UOPS_EXECUTED.THREAD: 12.5
  • RETIRE_SLOTS: 12.5
  • UOPS_MITE: 12.53
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.5
  • DIV_CYCLES: 57.95
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.51

With loop_count=1000, unroll_count=2, and padding (long NOPs)

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    17:	0f 1f 84 00 00 00 00 
    1e:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 58.25
  • Reference cycles: 56.49
  • UOPS_EXECUTED.THREAD: 12.5
  • RETIRE_SLOTS: 13.5
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.5
  • DIV_CYCLES: 58.24
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=20

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 58.24
  • Reference cycles: 56.48
  • UOPS_EXECUTED.THREAD: 12.05
  • RETIRE_SLOTS: 12.05
  • UOPS_MITE: 12.08
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.05
  • DIV_CYCLES: 58.23
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.06

With loop_count=100, unroll_count=20, and padding (long NOPs)

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    17:	0f 1f 84 00 00 00 00 
    1e:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.1
  • Core cycles: 58.5
  • Reference cycles: 56.72
  • UOPS_EXECUTED.THREAD: 12.05
  • RETIRE_SLOTS: 13.05
  • UOPS_MITE: 0.13
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.05
  • DIV_CYCLES: 58.5
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.05

With unroll_count=100 and no inner loop

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	c5 fc 5e f1          	vdivps ymm6,ymm0,ymm1
    14:	c5 fc 5e f9          	vdivps ymm7,ymm0,ymm1
    18:	c5 7c 5e c1          	vdivps ymm8,ymm0,ymm1
    1c:	c5 7c 5e c9          	vdivps ymm9,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 116.4
  • Reference cycles: 112.96
  • UOPS_EXECUTED.THREAD: 24.0
  • RETIRE_SLOTS: 24.0
  • UOPS_MITE: 24.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 8.0
  • DIV_CYCLES: 116.41
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	c5 fc 5e f1          	vdivps ymm6,ymm0,ymm1
    14:	c5 fc 5e f9          	vdivps ymm7,ymm0,ymm1
    18:	c5 7c 5e c1          	vdivps ymm8,ymm0,ymm1
    1c:	c5 7c 5e c9          	vdivps ymm9,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 115.91
  • Reference cycles: 112.41
  • UOPS_EXECUTED.THREAD: 25.0
  • RETIRE_SLOTS: 25.0
  • UOPS_MITE: 25.07
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 9.0
  • DIV_CYCLES: 115.9
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 9.02

With loop_count=1000, unroll_count=1, and padding (long NOPs)

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    17:	0f 1f 84 00 00 00 00 
    1e:	00 
    1f:	c5 fc 5e f1          	vdivps ymm6,ymm0,ymm1
    23:	c5 fc 5e f9          	vdivps ymm7,ymm0,ymm1
    27:	c5 7c 5e c1          	vdivps ymm8,ymm0,ymm1
    2b:	c5 7c 5e c9          	vdivps ymm9,ymm0,ymm1
    2f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    36:	0f 1f 84 00 00 00 00 
    3d:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 12.0
  • Core cycles: 116.5
  • Reference cycles: 112.97
  • UOPS_EXECUTED.THREAD: 25.0
  • RETIRE_SLOTS: 27.0
  • UOPS_MITE: 0.03
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 9.0
  • DIV_CYCLES: 116.48
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	c5 fc 5e f1          	vdivps ymm6,ymm0,ymm1
    14:	c5 fc 5e f9          	vdivps ymm7,ymm0,ymm1
    18:	c5 7c 5e c1          	vdivps ymm8,ymm0,ymm1
    1c:	c5 7c 5e c9          	vdivps ymm9,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 116.48
  • Reference cycles: 112.96
  • UOPS_EXECUTED.THREAD: 24.1
  • RETIRE_SLOTS: 24.11
  • UOPS_MITE: 24.16
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 8.1
  • DIV_CYCLES: 116.47
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.12

With loop_count=100, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    17:	0f 1f 84 00 00 00 00 
    1e:	00 
    1f:	c5 fc 5e f1          	vdivps ymm6,ymm0,ymm1
    23:	c5 fc 5e f9          	vdivps ymm7,ymm0,ymm1
    27:	c5 7c 5e c1          	vdivps ymm8,ymm0,ymm1
    2b:	c5 7c 5e c9          	vdivps ymm9,ymm0,ymm1
    2f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    36:	0f 1f 84 00 00 00 00 
    3d:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x3f8000003f800000;
  MOV RBX, 0x3f8000003f800000;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.2
  • Core cycles: 117.03
  • Reference cycles: 113.48
  • UOPS_EXECUTED.THREAD: 24.1
  • RETIRE_SLOTS: 26.1
  • UOPS_MITE: 0.26
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 8.1
  • DIV_CYCLES: 117.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.1

With unroll_count=500 and no inner loop

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.0
  • Core cycles: 14.15
  • Reference cycles: 13.7
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 3.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • DIV_CYCLES: 14.15
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 1 NOP

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	90                   	nop
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 14.21
  • Reference cycles: 13.78
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 4.0
  • UOPS_MITE: 4.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.0
  • DIV_CYCLES: 14.19
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 2.0

With unroll_count=500 and no inner loop

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	0f ae e8             	lfence 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.0
  • Core cycles: 29.25
  • Reference cycles: 28.33
  • UOPS_EXECUTED.THREAD: 3.0
  • RETIRE_SLOTS: 5.0
  • UOPS_MITE: 3.0
  • UOPS_MS: 2.0
  • UOPS_PORT_0: 2.25
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 0.75
  • DIV_CYCLES: 21.0
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.0

With loop_count=1000 and unroll_count=10

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.2
  • Core cycles: 14.1
  • Reference cycles: 13.67
  • UOPS_EXECUTED.THREAD: 3.1
  • RETIRE_SLOTS: 3.1
  • UOPS_MITE: 3.11
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.1
  • DIV_CYCLES: 14.1
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.1

With loop_count=1000, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
     b:	0f 1f 84 00 00 00 00 
    12:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.2
  • Core cycles: 14.13
  • Reference cycles: 13.7
  • UOPS_EXECUTED.THREAD: 3.1
  • RETIRE_SLOTS: 4.1
  • UOPS_MITE: 0.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.1
  • DIV_CYCLES: 14.14
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.0

With loop_count=100 and unroll_count=100

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 1.02
  • Core cycles: 14.17
  • Reference cycles: 13.75
  • UOPS_EXECUTED.THREAD: 3.01
  • RETIRE_SLOTS: 3.01
  • UOPS_MITE: 3.02
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.01
  • DIV_CYCLES: 14.17
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 1.01

With loop_count=100, unroll_count=100, and padding (long NOPs)

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
     b:	0f 1f 84 00 00 00 00 
    12:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 2.02
  • Core cycles: 14.29
  • Reference cycles: 13.86
  • UOPS_EXECUTED.THREAD: 3.01
  • RETIRE_SLOTS: 4.01
  • UOPS_MITE: 0.04
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 2.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 1.01
  • DIV_CYCLES: 14.3
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.02

With unroll_count=200 and no inner loop

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.0
  • Core cycles: 56.75
  • Reference cycles: 55.04
  • UOPS_EXECUTED.THREAD: 12.0
  • RETIRE_SLOTS: 12.0
  • UOPS_MITE: 12.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.0
  • DIV_CYCLES: 56.74
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.0

With loop_count=1000 and unroll_count=2

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.0
  • Core cycles: 56.24
  • Reference cycles: 54.54
  • UOPS_EXECUTED.THREAD: 12.5
  • RETIRE_SLOTS: 12.5
  • UOPS_MITE: 12.53
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.5
  • DIV_CYCLES: 56.25
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.51

With loop_count=1000, unroll_count=2, and padding (long NOPs)

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    17:	0f 1f 84 00 00 00 00 
    1e:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 6.0
  • Core cycles: 56.81
  • Reference cycles: 55.09
  • UOPS_EXECUTED.THREAD: 12.5
  • RETIRE_SLOTS: 13.5
  • UOPS_MITE: 0.01
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.5
  • DIV_CYCLES: 56.78
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=20

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 4.1
  • Core cycles: 56.68
  • Reference cycles: 54.96
  • UOPS_EXECUTED.THREAD: 12.05
  • RETIRE_SLOTS: 12.05
  • UOPS_MITE: 12.08
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.05
  • DIV_CYCLES: 56.67
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 4.06

With loop_count=100, unroll_count=20, and padding (long NOPs)

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    17:	0f 1f 84 00 00 00 00 
    1e:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 5.1
  • Core cycles: 56.95
  • Reference cycles: 55.22
  • UOPS_EXECUTED.THREAD: 12.05
  • RETIRE_SLOTS: 13.05
  • UOPS_MITE: 0.13
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 8.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 4.05
  • DIV_CYCLES: 56.94
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.05

With unroll_count=100 and no inner loop

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	c5 fc 5e f1          	vdivps ymm6,ymm0,ymm1
    14:	c5 fc 5e f9          	vdivps ymm7,ymm0,ymm1
    18:	c5 7c 5e c1          	vdivps ymm8,ymm0,ymm1
    1c:	c5 7c 5e c9          	vdivps ymm9,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.0
  • Core cycles: 113.5
  • Reference cycles: 110.08
  • UOPS_EXECUTED.THREAD: 24.0
  • RETIRE_SLOTS: 24.0
  • UOPS_MITE: 24.0
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 8.0
  • DIV_CYCLES: 113.51
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.0

With loop_count=1000 and unroll_count=1

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	c5 fc 5e f1          	vdivps ymm6,ymm0,ymm1
    14:	c5 fc 5e f9          	vdivps ymm7,ymm0,ymm1
    18:	c5 7c 5e c1          	vdivps ymm8,ymm0,ymm1
    1c:	c5 7c 5e c9          	vdivps ymm9,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.0
  • Core cycles: 112.48
  • Reference cycles: 109.08
  • UOPS_EXECUTED.THREAD: 25.0
  • RETIRE_SLOTS: 25.0
  • UOPS_MITE: 25.07
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 9.0
  • DIV_CYCLES: 112.48
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 9.02

With loop_count=1000, unroll_count=1, and padding (long NOPs)

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    17:	0f 1f 84 00 00 00 00 
    1e:	00 
    1f:	c5 fc 5e f1          	vdivps ymm6,ymm0,ymm1
    23:	c5 fc 5e f9          	vdivps ymm7,ymm0,ymm1
    27:	c5 7c 5e c1          	vdivps ymm8,ymm0,ymm1
    2b:	c5 7c 5e c9          	vdivps ymm9,ymm0,ymm1
    2f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    36:	0f 1f 84 00 00 00 00 
    3d:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 12.0
  • Core cycles: 113.61
  • Reference cycles: 110.18
  • UOPS_EXECUTED.THREAD: 25.0
  • RETIRE_SLOTS: 27.0
  • UOPS_MITE: 0.03
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 9.0
  • DIV_CYCLES: 113.6
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.01

With loop_count=100 and unroll_count=10

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	c5 fc 5e f1          	vdivps ymm6,ymm0,ymm1
    14:	c5 fc 5e f9          	vdivps ymm7,ymm0,ymm1
    18:	c5 7c 5e c1          	vdivps ymm8,ymm0,ymm1
    1c:	c5 7c 5e c9          	vdivps ymm9,ymm0,ymm1
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 8.2
  • Core cycles: 113.36
  • Reference cycles: 109.91
  • UOPS_EXECUTED.THREAD: 24.1
  • RETIRE_SLOTS: 24.11
  • UOPS_MITE: 24.16
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 8.1
  • DIV_CYCLES: 113.35
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 8.12

With loop_count=100, unroll_count=10, and padding (long NOPs)

• Code:

     0:	c5 fc 5e d1          	vdivps ymm2,ymm0,ymm1
     4:	c5 fc 5e d9          	vdivps ymm3,ymm0,ymm1
     8:	c5 fc 5e e1          	vdivps ymm4,ymm0,ymm1
     c:	c5 fc 5e e9          	vdivps ymm5,ymm0,ymm1
    10:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    17:	0f 1f 84 00 00 00 00 
    1e:	00 
    1f:	c5 fc 5e f1          	vdivps ymm6,ymm0,ymm1
    23:	c5 fc 5e f9          	vdivps ymm7,ymm0,ymm1
    27:	c5 7c 5e c1          	vdivps ymm8,ymm0,ymm1
    2b:	c5 7c 5e c9          	vdivps ymm9,ymm0,ymm1
    2f:	66 66 66 66 66 66 2e 	data16 data16 data16 data16 data16 nop WORD PTR cs:[rax+rax*1+0x0]
    36:	0f 1f 84 00 00 00 00 
    3d:	00 
  

• Init:

  MOV R15, 10000;
  L: VADDPS YMM0, YMM1, YMM1;
  VADDPS YMM0, YMM1, YMM1;
  DEC R15;
  JNZ L;
  VZEROALL;
  MOV RAX, 0x54ed392654ed3926;
  MOV RBX, 0x3f99f4c03f99f4c0;
  MOV [R14+0], RBX;
  MOV [R14+8], RBX;
  MOV [R14+16], RBX;
  MOV [R14+24], RBX;
  MOV [R14+32], RBX;
  MOV [R14+40], RBX;
  MOV [R14+48], RBX;
  MOV [R14+56], RBX;
  MOV [R14+64], RAX;
  MOV [R14+72], RAX;
  MOV [R14+80], RAX;
  MOV [R14+88], RAX;
  MOV [R14+96], RAX;
  MOV [R14+104], RAX;
  MOV [R14+112], RAX;
  MOV [R14+120], RAX;
  VMOVUPS YMM0, [R14+64];
  VMOVUPS YMM1, [R14]

• Show nanoBench command
• Results:
  • Instructions retired: 10.2
  • Core cycles: 113.9
  • Reference cycles: 110.45
  • UOPS_EXECUTED.THREAD: 24.1
  • RETIRE_SLOTS: 26.1
  • UOPS_MITE: 0.26
  • UOPS_MS: 0.0
  • UOPS_PORT_0: 16.0
  • UOPS_PORT_1: 0.0
  • UOPS_PORT_2: 0.0
  • UOPS_PORT_3: 0.0
  • UOPS_PORT_4: 0.0
  • UOPS_PORT_5: 8.1
  • DIV_CYCLES: 113.88
  • ILD_STALL.LCP: 0.0
  • UOPS_MITE>=1: 0.1