INVLPG (M8) - Throughput and Uops

With a non-indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	41 0f 01 3e          	invlpg BYTE PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 387.0
- Reference cycles: 305.66
- UOPS_RETIRED.ALL: 103.0
- UOPS_MS: 102.0

With loop_count=10 and unroll_count=1

Code:

   0:	41 0f 01 3e          	invlpg BYTE PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 390.82
- Reference cycles: 312.0
- UOPS_RETIRED.ALL: 105.0
- UOPS_MS: 102.0

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	43 0f 01 3c 2e       	invlpg BYTE PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 387.25
- Reference cycles: 305.81
- UOPS_RETIRED.ALL: 103.0
- UOPS_MS: 102.0

With loop_count=10 and unroll_count=1

Code:

   0:	43 0f 01 3c 2e       	invlpg BYTE PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 390.67
- Reference cycles: 312.0
- UOPS_RETIRED.ALL: 105.0
- UOPS_MS: 102.0