INVLPG (M8) - Throughput and Uops

With a non-indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	41 0f 01 3e          	invlpg BYTE PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 218.17
- Reference cycles: 136.4
- UOPS_EXECUTED.THREAD: 42.0
- RETIRE_SLOTS: 40.0
- UOPS_MITE: 0.23
- UOPS_MS: 42.14
- UOPS_PORT_0: 5.0
- UOPS_PORT_1: 6.0
- UOPS_PORT_6: 10.0
- UOPS_PORT_49: 5.0
- UOPS_PORT_78: 5.0
- UOPS_PORT_5B: 11.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.05

With unroll_count=500, no inner loop, and 1 NOP

Code:

   0:	41 0f 01 3e          	invlpg BYTE PTR [r14]
   4:	90                   	nop

Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 219.16
- Reference cycles: 137.07
- UOPS_EXECUTED.THREAD: 42.0
- RETIRE_SLOTS: 41.0
- UOPS_MITE: 1.0
- UOPS_MS: 42.0
- UOPS_PORT_0: 5.0
- UOPS_PORT_1: 6.0
- UOPS_PORT_6: 10.0
- UOPS_PORT_49: 5.0
- UOPS_PORT_78: 5.0
- UOPS_PORT_5B: 11.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 2 NOPs

Code:

   0:	41 0f 01 3e          	invlpg BYTE PTR [r14]
   4:	90                   	nop
   5:	90                   	nop

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 219.17
- Reference cycles: 137.07
- UOPS_EXECUTED.THREAD: 42.0
- RETIRE_SLOTS: 42.0
- UOPS_MITE: 2.0
- UOPS_MS: 42.0
- UOPS_PORT_0: 5.0
- UOPS_PORT_1: 6.0
- UOPS_PORT_6: 10.0
- UOPS_PORT_49: 5.0
- UOPS_PORT_78: 5.0
- UOPS_PORT_5B: 11.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With unroll_count=500, no inner loop, and 3 NOPs

Code:

   0:	41 0f 01 3e          	invlpg BYTE PTR [r14]
   4:	90                   	nop
   5:	90                   	nop
   6:	90                   	nop

Show nanoBench command
Results:
- Instructions retired: 4.0
- Core cycles: 219.23
- Reference cycles: 137.07
- UOPS_EXECUTED.THREAD: 42.0
- RETIRE_SLOTS: 43.0
- UOPS_MITE: 3.0
- UOPS_MS: 42.0
- UOPS_PORT_0: 5.0
- UOPS_PORT_1: 6.0
- UOPS_PORT_6: 10.0
- UOPS_PORT_49: 5.0
- UOPS_PORT_78: 5.0
- UOPS_PORT_5B: 11.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.06

With loop_count=10 and unroll_count=1

Code:

   0:	41 0f 01 3e          	invlpg BYTE PTR [r14]

Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 220.18
- Reference cycles: 132.6
- UOPS_EXECUTED.THREAD: 43.2
- RETIRE_SLOTS: 41.1
- UOPS_MITE: 5.17
- UOPS_MS: 48.77
- UOPS_PORT_0: 6.0
- UOPS_PORT_1: 6.0
- UOPS_PORT_6: 10.1
- UOPS_PORT_49: 5.0
- UOPS_PORT_78: 5.0
- UOPS_PORT_5B: 10.9
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.88

With an indexed addressing mode

With 1 independent instruction

With unroll_count=500 and no inner loop

Code:

   0:	43 0f 01 3c 2e       	invlpg BYTE PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 1.0
- Core cycles: 218.29
- Reference cycles: 142.17
- UOPS_EXECUTED.THREAD: 42.0
- RETIRE_SLOTS: 40.0
- UOPS_MITE: 0.0
- UOPS_MS: 42.0
- UOPS_PORT_0: 5.0
- UOPS_PORT_1: 6.0
- UOPS_PORT_6: 10.0
- UOPS_PORT_49: 5.0
- UOPS_PORT_78: 5.0
- UOPS_PORT_5B: 11.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 0.0

With unroll_count=500, no inner loop, and 1 NOP

Code:

   0:	43 0f 01 3c 2e       	invlpg BYTE PTR [r14+r13*1]
   5:	90                   	nop

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 2.0
- Core cycles: 219.16
- Reference cycles: 140.04
- UOPS_EXECUTED.THREAD: 42.0
- RETIRE_SLOTS: 41.0
- UOPS_MITE: 1.0
- UOPS_MS: 42.0
- UOPS_PORT_0: 5.0
- UOPS_PORT_1: 6.0
- UOPS_PORT_6: 10.0
- UOPS_PORT_49: 5.0
- UOPS_PORT_78: 5.0
- UOPS_PORT_5B: 11.0
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.0

With loop_count=10 and unroll_count=1

Code:

   0:	43 0f 01 3c 2e       	invlpg BYTE PTR [r14+r13*1]

Init:
```
XOR R13, R13
```
Show nanoBench command
Results:
- Instructions retired: 3.0
- Core cycles: 220.03
- Reference cycles: 140.4
- UOPS_EXECUTED.THREAD: 43.2
- RETIRE_SLOTS: 41.0
- UOPS_MITE: 5.0
- UOPS_MS: 48.75
- UOPS_PORT_0: 6.0
- UOPS_PORT_1: 6.0
- UOPS_PORT_6: 10.1
- UOPS_PORT_49: 5.0
- UOPS_PORT_78: 5.0
- UOPS_PORT_5B: 10.9
- UOPS_PORT_5B>=2: 0.0
- UOPS_PORT_23A: 0.0
- DIV_CYCLES: 0.0
- ILD_STALL.LCP: 0.0
- UOPS_MITE>=1: 1.88