NOP - Throughput and Uops
With unroll_count=500 and no inner loop
Code:
0: 90 nop
Show nanoBench command
Results:
Instructions retired: 1.0
Core cycles: 0.25
Reference cycles: 0.27
UOPS_RETIRED.ALL: 1.0
RETIRE_SLOTS: 1.0
UOPS_MITE: 1.0
UOPS_MS: 0.0
UOPS_PORT_0: 0.0
UOPS_PORT_1: 0.0
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 0.0
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
UOPS_MITE>=1: 0.25
With loop_count=1000 and unroll_count=10
Code:
0: 90 nop
Show nanoBench command
Results:
Instructions retired: 1.2
Core cycles: 0.3
Reference cycles: 0.3
UOPS_RETIRED.ALL: 1.1
RETIRE_SLOTS: 1.1
UOPS_MITE: 0.08
UOPS_MS: 0.0
UOPS_PORT_0: 0.0
UOPS_PORT_1: 0.0
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 0.1
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
UOPS_MITE>=1: 0.03
With loop_count=1000, unroll_count=10, and padding (redundant prefixes)
Code:
0: 40 rex 1: 40 rex 2: 40 rex 3: 40 rex 4: 40 rex 5: 40 rex 6: 40 90 rex xchg eax,eax
Show nanoBench command
Results:
Instructions retired: 1.2
Core cycles: 0.3
Reference cycles: 0.31
UOPS_RETIRED.ALL: 1.1
RETIRE_SLOTS: 1.1
UOPS_MITE: 0.0
UOPS_MS: 0.0
UOPS_PORT_0: 0.0
UOPS_PORT_1: 0.0
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 0.1
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
UOPS_MITE>=1: 0.0
With loop_count=100 and unroll_count=100
Code:
0: 90 nop
Show nanoBench command
Results:
Instructions retired: 1.02
Core cycles: 0.26
Reference cycles: 0.26
UOPS_RETIRED.ALL: 1.01
RETIRE_SLOTS: 1.01
UOPS_MITE: 1.01
UOPS_MS: 0.0
UOPS_PORT_0: 0.0
UOPS_PORT_1: 0.0
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 0.01
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
UOPS_MITE>=1: 0.26
With loop_count=100, unroll_count=100, and padding (redundant prefixes)
Code:
0: 40 rex 1: 40 rex 2: 40 rex 3: 40 rex 4: 40 rex 5: 40 rex 6: 40 90 rex xchg eax,eax
Show nanoBench command
Results:
Instructions retired: 1.02
Core cycles: 0.27
Reference cycles: 0.27
UOPS_RETIRED.ALL: 1.01
RETIRE_SLOTS: 1.01
UOPS_MITE: 0.01
UOPS_MS: 0.0
UOPS_PORT_0: 0.0
UOPS_PORT_1: 0.0
UOPS_PORT_2: 0.0
UOPS_PORT_3: 0.0
UOPS_PORT_4: 0.0
UOPS_PORT_5: 0.01
DIV_CYCLES: 0.0
ILD_STALL.LCP: 0.0
UOPS_MITE>=1: 0.0