uiCA is a simulator that can predict the throughput of basic blocks on recent Intel microarchitectures. In addition to that, it also provides insights into how the code is executed. uiCA is based on data from uops.info, combined with a detailed pipeline model. Like related tools, it assumes that all memory accesses result in cache hits.

Details on uiCA's pipeline model, as well as a comparison with similar tools, can be found in our paper Accurate Throughput Prediction of Basic Blocks on Recent Intel Microarchitectures.

An online version of uiCA is available at uiCA.uops.info.

The source code is available at https://github.com/andreas-abel/uiCA.

The benchmarks and scripts that were used for the evaluation are available at https://github.com/andreas-abel/uiCA-eval.