MUL (R64)
Summary:
"Unsigned Multiply"
Reference:
https://www.felixcloutier.com/x86/MUL.html
Extension:
BASE
Category:
BINARY
ISA-Set:
I86
CPL:
3
iform:
MUL_GPRv
iclass:
MUL
ASM:
MUL
Operands
Operand 1 (r): Register (RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8, R9, R10, R11, R12, R13, R14, R15)
Operand 2 (r/w, suppressed): Register (RAX)
Operand 3 (w, suppressed): Register (RDX)
Operand 4 (w, suppressed): Flags (AF: undef, CF: w, OF: w, PF: undef, SF: undef, ZF: undef)
Available performance data
Alder Lake-P
Alder Lake-E
Rocket Lake
Tiger Lake
Ice Lake
Cascade Lake
Cannon Lake
Skylake-X
Coffee Lake
Kaby Lake
Skylake
Broadwell
Haswell
Ivy Bridge
Sandy Bridge
Westmere
Nehalem
Wolfdale
Conroe
Tremont
Goldmont Plus
Goldmont
Airmont
Bonnell
AMD Zen 4
AMD Zen 3
AMD Zen 2
AMD Zen+
Alder Lake-P
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (4 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p1+1*p5
Alder Lake-E
Measurements
Latencies
Latency operand 1 → 2:
5
Latency operand 1 → 3:
6
Latency operand 1 → 4:
5
Latency operand 2 → 2:
5
Latency operand 2 → 3:
6
Latency operand 2 → 4:
5
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Microcode Sequencer (MS): 0
Rocket Lake
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (3 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p1+1*p5
Tiger Lake
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (3 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p1+1*p5
Ice Lake
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (3 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p1+1*p5
Cascade Lake
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (3 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p1+1*p5
Cannon Lake
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (3 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p1+1*p5
Skylake-X
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (3 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p1+1*p5
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p1+1*p5
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
0.95
Number of μops:
2
Port usage:
1*p1+1*p5
Coffee Lake
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (3 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p1+1*p5
Kaby Lake
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (3 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p1+1*p5
Skylake
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (3 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p1+1*p5
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p1+1*p5
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
0.95
Number of μops:
2
Port usage:
1*p1+1*p5
Broadwell
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (2 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p1+1*p5
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p1+1*p5
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p1+1*p5
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
0.95
Number of μops:
2
Port usage:
1*p1+1*p5
Haswell
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.15
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (2 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p06+1*p1
IACA 2.1
Latency:
4
Throughput
Computed from the port usage: 1.00
IACA:
1.05 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p0+1*p1
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p06+1*p1
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p06+1*p1
IACA 3.0
Throughput
Computed from the port usage: 1.00
IACA:
0.95
Number of μops:
2
Port usage:
1*p06+1*p1
Ivy Bridge
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.02
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (2 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p0+1*p1
IACA 2.1
Latency:
4
Throughput
Computed from the port usage: 1.00
IACA:
1.05 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p0+1*p1
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p0+1*p1
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p0+1*p1
Sandy Bridge
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
1.02
Measured (unrolled):
1.00
Number of μops
Executed: 2
Retire slots: 2
Decoded (MITE): 2
Microcode Sequencer (MS): 0
Requires the complex decoder (2 other instructions can be decoded with simple decoders in the same cycle)
Port usage:
1*p0+1*p1
IACA 2.1
Latency:
4
Throughput
Computed from the port usage: 1.00
IACA:
1.05 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p0+1*p1
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p0+1*p1
IACA 2.3
Throughput
Computed from the port usage: 1.00
IACA:
1.00
Number of μops:
2
Port usage:
1*p0+1*p1
Westmere
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
10
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
10
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
2.00
Measured (unrolled):
2.00
Number of μops
Executed: 3
Retire slots: 3
Microcode Sequencer (MS): 0
Requires the complex decoder
Port usage:
1*p0+1*p015+1*p1
IACA 2.1
Latency:
8
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p0+1*p1
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p0+1*p1
Nehalem
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
10
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
10
Latency operand 2 → 4:
3
Throughput
Computed from the port usage: 1.00
Measured (loop):
2.00
Measured (unrolled):
2.00
Number of μops
Executed: 3
Retire slots: 3
Microcode Sequencer (MS): 0
Requires the complex decoder
Port usage:
1*p0+1*p015+1*p1
IACA 2.1
Latency:
8
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p0+1*p1
IACA 2.2
Throughput
Computed from the port usage: 1.00
IACA:
1.00 (with the -no_interiteration flag: 1.00)
Number of μops:
2
Port usage:
1*p0+1*p1
Wolfdale
Measurements
Latencies
Latency operand 1 → 2:
9
Latency operand 1 → 3:
7
Latency operand 1 → 4:
7
Latency operand 2 → 2:
7
Latency operand 2 → 3:
8
Latency operand 2 → 4:
8
Throughput
Computed from the port usage: 2.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 3
Port usage:
2*p0+1*p015
Conroe
Measurements
Latencies
Latency operand 1 → 2:
9
Latency operand 1 → 3:
7
Latency operand 1 → 4:
7
Latency operand 2 → 2:
7
Latency operand 2 → 3:
8
Latency operand 2 → 4:
8
Throughput
Computed from the port usage: 2.00
Measured (loop):
4.00
Measured (unrolled):
4.00
Number of μops
Executed: 3
Port usage:
2*p0+1*p015
Tremont
Measurements
Latencies
Latency operand 1 → 2:
5
Latency operand 1 → 3:
6
Latency operand 1 → 4:
5
Latency operand 2 → 2:
5
Latency operand 2 → 3:
6
Latency operand 2 → 4:
5
Throughput
Measured (loop):
2.00
Measured (unrolled):
2.00
Number of μops
Executed: 2
Microcode Sequencer (MS): 0
Goldmont Plus
Measurements
Latencies
Latency operand 1 → 2:
5
Latency operand 1 → 3:
6
Latency operand 1 → 4:
5
Latency operand 2 → 2:
5
Latency operand 2 → 3:
6
Latency operand 2 → 4:
5
Throughput
Measured (loop):
2.00
Measured (unrolled):
2.00
Number of μops
Executed: 2
Microcode Sequencer (MS): 0
Goldmont
Measurements
Latencies
Latency operand 1 → 2:
5
Latency operand 1 → 3:
6
Latency operand 1 → 4:
5
Latency operand 2 → 2:
5
Latency operand 2 → 3:
6
Latency operand 2 → 4:
5
Throughput
Measured (loop):
2.16
Measured (unrolled):
2.00
Number of μops
Executed: 2
Microcode Sequencer (MS): 0
Airmont
Measurements
Latencies
Latency operand 1 → 2:
6
Latency operand 1 → 3:
8
Latency operand 1 → 4:
6
Latency operand 2 → 2:
7
Latency operand 2 → 3:
5
Latency operand 2 → 4:
7
Throughput
Measured (loop):
7.02
Measured (unrolled):
7.00
Number of μops
Executed: 3
Microcode Sequencer (MS): 3
Requires the complex decoder
Bonnell
Measurements
Latencies
Latency operand 1 → 2:
16
Latency operand 1 → 3:
16
Latency operand 1 → 4:
16
Latency operand 2 → 2:
14
Latency operand 2 → 3:
17
Latency operand 2 → 4:
17
Throughput
Measured (loop):
14.11
Measured (unrolled):
14.11
Number of μops
Executed: 8
Microcode Sequencer (MS): 8
Requires the complex decoder
AMD Zen 4
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
AMD Zen 3
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Documentation
Latency: 3,4
Throughput: 1.00
Number of μops: 1-2
Port usage: ALU1
AMD Zen 2
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
4
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
4
Throughput
Measured (loop):
1.00
Measured (unrolled):
1.00
Number of μops
Executed: 2
Documentation
Latency: 3,4
Throughput: 1.00
Number of μops: 1-2
Port usage: ALU1
AMD Zen+
Measurements
Latencies
Latency operand 1 → 2:
3
Latency operand 1 → 3:
4
Latency operand 1 → 4:
3
Latency operand 2 → 2:
3
Latency operand 2 → 3:
4
Latency operand 2 → 4:
3
Throughput
Measured (loop):
2.00
Measured (unrolled):
2.00
Number of μops
Executed: 2
Documentation
Latency: 3
Throughput: 1.00
Number of μops: 1
Port usage: ALU1